a "addeq r1, r1, r0" 00108100
a "ands R2, r2" 022012e0
aB "addeq r1, r1, r2, lsl #2" 02118100
a "addne r1, r1, ip" 0c108110
aB "addne r1, r1, r0, lsl #2" 00118110
a "andeq r0, r0, 1" 01000002
aB "andeq r3, r5 -2147483648" 02310502
a "andne r3, r3, r2" 02300310
a "andne ip, ip, r7" 07c00c10
aB "asreq r0, ip, 31" cc0fa001
aB "asrne r0, r4, 31" c40fa011
a "beq 8" 0000000a
aB "biceq r3, r3, 7" 0730c303
a "blne 0x1900" 3e06001b
a "blx 0x1" fefffffa
a "blx 0x2" fefffffb
a "blx 0xa" 000000fb
a "blx 0xc" 010000fa
aB "bxeq Lr" 1eff2f01
aB "bxne Lr" 1eff2f11
a "clzne r5, sl" 1a5f6f11
aB "cmpeq sl, r4" 40005a01
ad "cmpne r7, r6" 06005711
a "eoreq r2, r2, 1" 01202202
a "eorne r0, r0, r3" 03002010
aB "eorne r0, r0, r3, lsr #24" 230c2010
a "eors R2, r2" 022032e0
aB "ldmdbeQ r2, {r0, r1}" 03001209
aB "ldmeq r3, {r0, r1, r2, r3}" 0f009308
aB "ldmeq r5, {r0, r1, r2}" 07009508
aB "ldmeq r6, {r0, r1}" 03009608
aB "ldrbeq r5, [r7, -1]" 01505705
aB "ldrne r2, [r3, ip]" dc208311
aB "ldreq r0, [fp, -180]" b4001b05
aB "ldrheq r0, [r3, r0]" b0009301
aB "ldrex r0, [r3]" 9f0f93e1
aB "lslne r1, r1, 2" 0111a011
aB "lsreq r0, r0, 16" 2008a001
aB "lsrne r0, r0, 9" a004a011
aB "mlaeq r7, r5, r7, r0" 95072700
aB "mlane r3, r1, r3, r2" 91232310
a "moveq r0, sl" 0a00a001
a "movne r0, r9" 0900a011
aB "mulne r3, r3, r0" 93000310
ad "mul r2, r3, r4" 930402e0 0x0 (set r2 (* (var r3) (var r4)))
ad "mul r6, r6, r2" 960206e0 0x0 (set r6 (* (var r6) (var r2)))
d "muls r0, r1, r2" 910210e0 0x0 (seq (set r0 (* (var r1) (var r2))) (set zf (is_zero (var r0))) (set nf (msb (var r0))))
a "smull r4, r1, r2, r3" 9243c1e0
a "smlal r4, r1, r2, r3" 9243e1e0
a "smlabb r4, r7, r3, r1" 871304e1
a "smlabt r4, r7, r3, r1" c71304e1
a "smlatb r4, r7, r3, r1" a71304e1
a "smlatt r4, r7, r3, r1" e71304e1
a "mvneq r0, 21" 1500e003
a "mvneq r0, -2147483648" 0201e003
a "orreq r5, r5, r3" 03508501
aB "orreq r6, r6, r2, lsr #1" a2608601
aB "orreq r3, r3, -2147483648" 02318303
aB "orrne r0, r0, r1, lsl ip" 110c8011
a "orrne r1, r1, r3" 03108111
a "orrs R2, r2" 022092e1
aB "popeq {pc} ; (LDREQQ pc, [sp], 4)" 04f09d04
a "popeq {r4, pc}" 1080bd08
a "popeq {r4, r5, pc}" 3080bd08
a "popeq {r3, r4, r5, pc}" 3880bd08
a "popeq {r4, r5, r6, r7, pc}" f080bd08
a "popeq {r3, r4, r5, r6, r7, pc}" f880bd08
a "popeq {r3, r4, r5, r6, r7, r8, sl, pc}" f885bd08
a "popeq {r3, r4, r5, r6, r7, r8, r9, sl, fp, pc}" f88fbd08
a "reveq r3, r3" 333fbf06
a "rsbeq ip, r1, r7" 07c06100
a "rsbne r6, r0, r6" 06606010
aB "stmeq r0, {r2, r3}" 0c008008
aB "stmeq ip, {r0, r1, r2}" 07008c08
aB "stmeq ip, {r0, r1, r2, r3}" 0f008c08
aB "strbeq ip, [r2, -1]" 01c04205
aB "strbeq r3, [r5]" 0030c505
aB "strdeq r2, [r4]" f020c401
aB "strdeq r4, [r8, 80]" f045c801
aB "streq r3, [r5, -4]" 04300505
aB "streq r1, [fp, -304]" 30110b05
aB "strhne r3, [fp, -50]" b2334b11
aB "strheq r3, [fp, -56]" b8334b01
aB "strheq r1, [r0]" b010c001
aB "strhne r1, [r2,r3]" b3108211
a "strex r1, r2, [r5]" 921f85e1
a "subeq ip, r0, 32" 20c04002
aB "subne r6, r3, r6, asr 1" c6604310
a "subne r5, r5, r3" 03504510
a "svceq 0x00000000" 0000000f
aB "umlalnE r4, r5, r3, r7" 9347a510
aB "uxtbeq r1, r0" 7010ef06
aB "uxtheq r0, r0" 7000ff06
aB "vstreq d0, [r0]" 000b800d
a "ldr r1, [r2, r3]" 031092e7
aB "ldr r1, [r2, r3, lsl 2]" 031192e7
aB "ldr r1, [r2, r3, lsr 5]" a31292e7
aB "ldr r1, [r2, r3, asr 6]" 431392e7
aB "ldr r1, [r2, r3, ror 9]" e31492e7
a "mrc p5, 1, r4, c2, c4, 6" d44532ee
a "mrc p4, 4, r5, c2, c2" 125492ee
a "mrc p3, 0, r5, c3, c5, 6" d55313ee
a "bic r1, r2, r3" 0310c2e1
a "bic r3, r2" 0230c3e1
ad "strb r2, [r3, r4]" 0420c3e7 0x0 (store 0 (+ (var r3) (var r4)) (cast 8 false (var r2)))
ad "strb r2, [r3, 6]" 0620c3e5 0x0 (store 0 (+ (var r3) (bv 32 0x6)) (cast 8 false (var r2)))
a "strbt r3, [r7]" 0030e7e4
a "strbt r1, [r2]" 0010e2e4
a "strd r6, r7, [r7, 86]" f665c7e1
a "strd r2, r3, [r3]" f020c3e1
a "strexb r2, r5, [r6]" 952fc6e1
a "strexb r5, r2, [r4]" 925fc4e1
a "strexh r2, r5, [r6]" 952fe6e1
a "strexh r5, r2, [r4]" 925fe4e1
ad "strh r5, [r2, r4]" b45082e1 0x0 (storew 0 (+ (var r2) (var r4)) (cast 16 false (var r5)))
aB "strxh r5, [r2, 4]" b450c2e1
d "addeq r1, r1, r0" 00108100 0x0 (branch (var zf) (set r1 (+ (var r1) (var r0))) nop)
d "addeq r1, r1, r2, lsl 2" 02118100
d "addne r1, r1, ip" 0c108110 0x0 (branch (! (var zf)) (set r1 (+ (var r1) (var r12))) nop)
d "addne r1, r1, r0, lsl 2" 00118110
ad "adc r0, r1, 0x2a" 2a00a1e2 0x0 (set r0 (+ (+ (var r1) (bv 32 0x2a)) (ite (var cf) (bv 32 0x1) (bv 32 0x0))))
d "adcs r0, r1, 0x2a" 2a00b1e2 0x0 (seq (set a (var r1)) (set b (bv 32 0x2a)) (set r0 (+ (+ (var r1) (bv 32 0x2a)) (ite (var cf) (bv 32 0x1) (bv 32 0x0)))) (set cf (msb (+ (+ (cast 33 false (var a)) (cast 33 false (var b))) (ite (var cf) (bv 33 0x1) (bv 33 0x0))))) (set vf (&& (! (^^ (msb (var a)) (msb (var b)))) (^^ (msb (var a)) (msb (var r0))))) (set zf (is_zero (var r0))) (set nf (msb (var r0))))
ad "adds r0, r1, 0x2a" 2a0091e2 0x0 (seq (set a (var r1)) (set b (bv 32 0x2a)) (set r0 (+ (var r1) (bv 32 0x2a))) (set cf (msb (+ (cast 33 false (var a)) (cast 33 false (var b))))) (set vf (&& (! (^^ (msb (var a)) (msb (var b)))) (^^ (msb (var a)) (msb (var r0))))) (set zf (is_zero (var r0))) (set nf (msb (var r0))))
d "add ip, ip, 48, 20" 30ca8ce2 0x0 (set r12 (+ (var r12) (bv 32 0x30000)))
d "add r2, pc, 0x30" 30208fe2 0x2000 (set r2 (bv 32 0x2038))
d "sub sp, sp, 0x1c" 1cd04de2 0x0 (set sp (- (var sp) (bv 32 0x1c)))
d "sub r6, r7, r5" 056047e0 0x0 (set r6 (- (var r7) (var r5)))
d "subs r6, r7, r5" 056057e0 0x0 (seq (set a (var r7)) (set b (var r5)) (set r6 (- (var r7) (var r5))) (set cf (ule (var b) (var a))) (set vf (&& (^^ (msb (var a)) (msb (var b))) (^^ (msb (var a)) (msb (var r6))))) (set zf (is_zero (var r6))) (set nf (msb (var r6))))
d "sub r5, pc, 0x27" 27504fe2 0x1000 (set r5 (bv 32 0xfe1))
d "sub r5, pc, r6" 06504fe0 0x1000 (set r5 (- (bv 32 0x1008) (var r6)))
d "add r5, pc, r6" 06508fe0 0x1000 (set r5 (+ (bv 32 0x1008) (var r6)))
d "rsb r6, r6, 0xc" 0c6066e2 0x0 (set r6 (- (bv 32 0xc) (var r6)))
d "rsb r6, r7, r5" 056067e0 0x0 (set r6 (- (var r5) (var r7)))
d "rsbs r6, r7, r5" 056077e0 0x0 (seq (set a (var r5)) (set b (var r7)) (set r6 (- (var r5) (var r7))) (set cf (ule (var b) (var a))) (set vf (&& (^^ (msb (var a)) (msb (var b))) (^^ (msb (var a)) (msb (var r6))))) (set zf (is_zero (var r6))) (set nf (msb (var r6))))
d "rsc r6, r6, 0xc" 0c60e6e2 0x0 (set r6 (- (- (bv 32 0xc) (var r6)) (ite (var cf) (bv 32 0x0) (bv 32 0x1))))
d "rsc r6, r7, r5" 0560e7e0 0x0 (set r6 (- (- (var r5) (var r7)) (ite (var cf) (bv 32 0x0) (bv 32 0x1))))
d "rscs r6, r7, r5" 0560f7e0 0x0 (seq (set a (var r5)) (set b (var r7)) (set r6 (- (- (var r5) (var r7)) (ite (var cf) (bv 32 0x0) (bv 32 0x1)))) (set cf (msb (+ (+ (cast 33 false (var a)) (cast 33 false (~ (var b)))) (ite (var cf) (bv 33 0x1) (bv 33 0x0))))) (set vf (&& (^^ (msb (var a)) (msb (var b))) (^^ (msb (var a)) (msb (var r6))))) (set zf (is_zero (var r6))) (set nf (msb (var r6))))
d "sbc r6, r6, 0xc" 0c60c6e2 0x0 (set r6 (- (- (var r6) (bv 32 0xc)) (ite (var cf) (bv 32 0x0) (bv 32 0x1))))
d "sbc r6, r7, r5" 0560c7e0 0x0 (set r6 (- (- (var r7) (var r5)) (ite (var cf) (bv 32 0x0) (bv 32 0x1))))
d "sbcs r6, r7, r5" 0560d7e0 0x0 (seq (set a (var r7)) (set b (var r5)) (set r6 (- (- (var r7) (var r5)) (ite (var cf) (bv 32 0x0) (bv 32 0x1)))) (set cf (msb (+ (+ (cast 33 false (var a)) (cast 33 false (~ (var b)))) (ite (var cf) (bv 33 0x1) (bv 33 0x0))))) (set vf (&& (^^ (msb (var a)) (msb (var b))) (^^ (msb (var a)) (msb (var r6))))) (set zf (is_zero (var r6))) (set nf (msb (var r6))))
d "andeq r0, r0, 1" 01000002
d "andeq r3, r5, -0x80000000" 02310502
d "andne r3, r3, r2" 02300310
d "andne ip, ip, r7" 07c00c10
d "asreq r0, ip, 31" cc0fa001
d "asrne r0, r4, 31" c40fa011
d "beq 8" 0000000a 0x0 (branch (var zf) (jmp (bv 32 0x8)) nop)
d "biceq r3, r3, 7" 0730c303
d "blne 0x1900" 3E06001B
d "bl 0x1900" 3e0600eb
d "b 0x1900" 3e0600ea 0x0 (jmp (bv 32 0x1900))
d "b 0x2900" 3e0600ea 0x1000 (jmp (bv 32 0x2900))
d "beq 0x1900" 3e06000a 0x0 (branch (var zf) (jmp (bv 32 0x1900)) nop)
d "bne 0x1900" 3e06001a 0x0 (branch (! (var zf)) (jmp (bv 32 0x1900)) nop)
d "bhs 0x1900" 3e06002a 0x0 (branch (var cf) (jmp (bv 32 0x1900)) nop)
d "blo 0x1900" 3e06003a 0x0 (branch (! (var cf)) (jmp (bv 32 0x1900)) nop)
d "bmi 0x1900" 3e06004a 0x0 (branch (var nf) (jmp (bv 32 0x1900)) nop)
d "bpl 0x1900" 3e06005a 0x0 (branch (! (var nf)) (jmp (bv 32 0x1900)) nop)
d "bvs 0x1900" 3e06006a 0x0 (branch (var vf) (jmp (bv 32 0x1900)) nop)
d "bvc 0x1900" 3e06007a 0x0 (branch (! (var vf)) (jmp (bv 32 0x1900)) nop)
d "bhi 0x1900" 3e06008a 0x0 (branch (&& (var cf) (! (var zf))) (jmp (bv 32 0x1900)) nop)
d "bls 0x1900" 3e06009a 0x0 (branch (|| (! (var cf)) (var zf)) (jmp (bv 32 0x1900)) nop)
d "bge 0x1900" 3e0600aa 0x0 (branch (! (^^ (var nf) (var vf))) (jmp (bv 32 0x1900)) nop)
d "blt 0x1900" 3e0600ba 0x0 (branch (^^ (var nf) (var vf)) (jmp (bv 32 0x1900)) nop)
d "bgt 0x1900" 3e0600ca 0x0 (branch (&& (! (var zf)) (! (^^ (var nf) (var vf)))) (jmp (bv 32 0x1900)) nop)
d "ble 0x1900" 3e0600da 0x0 (branch (|| (var zf) (^^ (var nf) (var vf))) (jmp (bv 32 0x1900)) nop)
d "b 0x1900" 3e0600ea 0x0 (jmp (bv 32 0x1900))
d "bxeq lr" 1eff2f01
d "bxne lr" 1eff2f11
d "clzne r5, sl" 1a5f6f11
d "cmpeq sl, r0, asr 32" 40005a01
d "cmpne r7, r6" 06005711
d "eoreq r2, r2, 1" 01202202
d "eorne r0, r0, r3" 03002010
d "eorne r0, r0, r3, lsr 24" 230c2010
d "ldmdbeq r2, {r0, r1}" 03001209
d "ldmeq r3, {r0, r1, r2, r3}" 0f009308
d "ldmeq r5, {r0, r1, r2}" 07009508
d "ldmeq r6, {r0, r1}" 03009608
d "ldrbeq r5, [r7, -1]" 01505705
d "ldrdne r2, r3, [r3, ip]" dc208311
d "ldreq r0, [fp, -0xb4]" b4001b05
d "ldrheq r0, [r3, r0]" b0009301
d "lslne r1, r1, 2" 0111a011
d "lsreq r0, r0, 16" 2008a001
d "lsrne r0, r0, 9" a004a011
d "mlaeq r7, r5, r7, r0" 95072700
d "mlane r3, r1, r3, r2" 91232310
d "moveq r0, sl" 0a00a001
d "movne r0, sb" 0900a011
d "mulne r3, r3, r0" 93000310
d "mvneq r0, 0x15" 1500e003
d "mvneq r0, -0x80000000" 0201e003
d "orreq r5, r5, r3" 03508501
d "orreq r6, r6, r2, lsr 1" a2608601
d "orreq r3, r3, -0x80000000" 02318303
d "orrne r0, r0, r1, lsl ip" 110c8011
d "orrne r1, r1, r3" 03108111
d "popeq {pc}" 04f09d04
d "popeq {r4, pc}" 1080bd08
d "popeq {r4, r5, pc}" 3080bd08
d "popeq {r3, r4, r5, pc}" 3880bd08
d "popeq {r4, r5, r6, r7, pc}" f080bd08
d "popeq {r3, r4, r5, r6, r7, pc}" f880bd08
d "popeq {r3, r4, r5, r6, r7, r8, sl, pc}" f885bd08
d "popeq {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}" f88fbd08
d "reveq r3, r3" 333fbf06
d "rsbeq ip, r1, r7" 07c06100
d "rsbne r6, r0, r6" 06606010
d "stmeq r0, {r2, r3}" 0c008008
d "stmeq ip, {r0, r1, r2}" 07008c08
d "stmeq ip, {r0, r1, r2, r3}" 0f008c08
d "strbeq ip, [r2, -1]" 01c04205
d "strbeq r3, [r5]" 0030c505
d "strdeq r2, r3, [r4]" f020c401
d "strdeq r4, r5, [r8, 0x50]" f045c801
d "streq r3, [r5, -4]" 04300505
d "streq r1, [fp, -0x130]" 30110b05
d "strhne r3, [fp, -0x32]" b2334b11
d "strheq r3, [fp, -0x38]" b8334b01
d "strheq r1, [r0]" b010c001
d "strhne r1, [r2, r3]" b3108211
d "subeq ip, r0, 0x20" 20c04002
d "subne r6, r3, r6, asr 1" c6604310
d "subne r5, r5, r3" 03504510
d "svceq 0" 0000000f
d "umlalne r4, r5, r3, r7" 9347a510
d "uxtbeq r1, r0" 7010ef06
d "uxtheq r0, r0" 7000ff06
d "vstreq d0, [r0]" 000b800d
d "blne 0x1900" 8374211b 0xff7a46ec
ad "mov r0, 0x2a" 2a00a0e3 0x0 (set r0 (bv 32 0x2a))
ad "movs r1, 0" 0010b0e3 0x0 (seq (set r1 (bv 32 0x0)) (set zf (is_zero (var r1))) (set nf (msb (var r1))))
d "movs r1, 0, 2" 0011b0e3 0x0 (seq (set cf_tmp false) (set r1 (bv 32 0x0)) (set cf (var cf_tmp)) (set zf (is_zero (var r1))) (set nf (msb (var r1))))
d "movs r1, 1, 30" 011fb0e3 0x0 (seq (set cf_tmp false) (set r1 (bv 32 0x4)) (set cf (var cf_tmp)) (set zf (is_zero (var r1))) (set nf (msb (var r1))))
d "movs r1, 4" 0410b0e3 0x0 (seq (set r1 (bv 32 0x4)) (set zf (is_zero (var r1))) (set nf (msb (var r1))))
d "movs r1, 0x40000000" 0111b0e3 0x0 (seq (set cf_tmp false) (set r1 (bv 32 0x40000000)) (set cf (var cf_tmp)) (set zf (is_zero (var r1))) (set nf (msb (var r1))))
d "movs r1, -0x80000000" 0211b0e3 0x0 (seq (set cf_tmp true) (set r1 (bv 32 0x80000000)) (set cf (var cf_tmp)) (set zf (is_zero (var r1))) (set nf (msb (var r1))))
ad "movs r0, 0x2a" 2a00b0e3 0x0 (seq (set r0 (bv 32 0x2a)) (set zf (is_zero (var r0))) (set nf (msb (var r0))))
ad "mov pc, 0x2a" 2af0a0e3 0x0 (jmp (bv 32 0x2a))
ad "movs pc, 0x2a" 2af0b0e3
ad "mov r1, r6" 0610a0e1 0x0 (set r1 (var r6))
ad "movs r1, r6" 0610b0e1 0x0 (seq (set r1 (var r6)) (set zf (is_zero (var r1))) (set nf (msb (var r1))))
ad "movw r3, 0x1034" 343001e3 0x0 (set r3 (bv 32 0x1034))
ad "movt r3, 2" 023040e3 0x0 (set r3 (append (bv 16 0x2) (cast 16 false (var r3))))
aB "addeq r1, r1, r2, lsl 2" 02118100
a "addne r1, r1, ip" 0c108110
aB "addne r1, r1, r0, lsl 2" 00118110
a "andeq r0, r0, 1" 01000002
aB "andeq r3, r5, 0x80000000" 02310502
a "andne r3, r3, r2" 02300310
a "andne ip, ip, r7" 07c00c10
aB "asreq r0, ip, 0x1f" cc0fa001
aB "asrne r0, r4, 0x1f" c40fa011
aB "biceq r3, r3, 7" 0730c303
a "blne 0x1900" 3E06001B
a "bl 0x1900" 3e0600eb
a "b 0x1900" 3e0600ea
aB "bxeq lr" 1eff2f01
aB "bxne lr" 1eff2f11
a "clzne r5, sl" 1a5f6f11
aB "cmpeq sl, r0, asr 32" 40005a01
a "cmpne r7, r6" 06005711
a "eoreq r2, r2, 1" 01202202
a "eorne r0, r0, r3" 03002010
aB "eorne r0, r0, r3, lsr 24" 230c2010
aB "ldmdbeq r2, {r0, r1}" 03001209
aB "ldmeq r3, {r0, r1, r2, r3}" 0f009308
aB "ldmeq r5, {r0, r1, r2}" 07009508
aB "ldmeq r6, {r0, r1}" 03009608
aB "ldrbeq r5, [r7, -1]" 01505705
aB "ldrdne r2, r3, [r3, ip]" dc208311
aB "ldreq r0, [fp, -0xb4]" b4001b05
aB "ldrheq r0, [r3, r0]" b0009301
aB "lslne r1, r1, 2" 0111a011
aB "lsreq r0, r0, 0x10" 2008a001
aB "lsrne r0, r0, 9" a004a011
aB "mlaeq r7, r5, r7, r0" 95072700
aB "mlane r3, r1, r3, r2" 91232310
a "movne r0, sb" 0900a011
aB "mulne r3, r3, r0" 93000310
a "mvneq r0, 0x15" 1500e003
a "mvneq r0, 0x80000000" 0201e003
a "orreq r5, r5, r3" 03508501
aB "orreq r6, r6, r2, lsr 1" a2608601
aB "orreq r3, r3, 0x80000000" 02318303
aB "orrne r0, r0, r1, lsl ip" 110c8011
a "orrne r1, r1, r3" 03108111
aB "popeq {pc}" 04f09d04
a "popeq {r4, pc}" 1080bd08
a "popeq {r4, r5, pc}" 3080bd08
a "popeq {r3, r4, r5, pc}" 3880bd08
a "popeq {r4, r5, r6, r7, pc}" f080bd08
a "popeq {r3, r4, r5, r6, r7, pc}" f880bd08
a "popeq {r3, r4, r5, r6, r7, r8, sl, pc}" f885bd08
a "popeq {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}" f88fbd08
a "reveq r3, r3" 333fbf06
a "rsbeq ip, r1, r7" 07c06100
a "rsbne r6, r0, r6" 06606010
aB "stmeq r0, {r2, r3}" 0c008008
aB "stmeq ip, {r0, r1, r2}" 07008c08
aB "stmeq ip, {r0, r1, r2, r3}" 0f008c08
aB "strbeq ip, [r2, -1]" 01c04205
aB "strbeq r3, [r5]" 0030c505
aB "strdeq r2, r3, [r4]" f020c401
aB "strdeq r4, r5, [r8, 0x50]" f045c801
aB "streq r3, [r5, -4]" 04300505
aB "streq r1, [fp, -0x130]" 30110b05
aB "strhne r3, [fp, -0x32]" b2334b11
aB "strheq r3, [fp, -0x38]" b8334b01
aB "strheq r1, [r0]" b010c001
aB "strhne r1, [r2, r3]" b3108211
a "subeq ip, r0, 0x20" 20c04002
aB "subne r6, r3, r6, asr 1" c6604310
a "subne r5, r5, r3" 03504510
a "svceq 0" 0000000f
aB "umlalne r4, r5, r3, r7" 9347a510
aB "uxtbeq r1, r0" 7010ef06
aB "uxtheq r0, r0" 7000ff06
aB "vstreq d0, [r0]" 000b800d
a "lsr r0, r1, r3" 3103a0e1
a "lsl r2, r8, r5" 1825a0e1
a "asr r4, r5, r0" 5540a0e1
a "ror r7, r6, r1" 7671a0e1
a "ldr r0, [r0]" 000090e5
a "ldr r1, [r2]" 001092e5
ad "teq r3, r4" 040033e1
ad "str r0, [r0]" 000080e5 0x0 (storew 0 (var r0) (var r0))
ad "str r1, [r2]" 001082e5 0x0 (storew 0 (var r2) (var r1))
d "ldr r2, [fp, -0xc]" 0c201be5 0x200 (set r2 (loadw 0 32 (- (var r11) (bv 32 0xc))))
ad "ldr r1, [r7]" 001097e5 0x200 (set r1 (loadw 0 32 (var r7)))
ad "ldr pc, [r8]" 00f098e5 0x200 (jmp (loadw 0 32 (var r8)))
d "ldr r1, [r2, r3]" 031092e7 0x200 (set r1 (loadw 0 32 (+ (var r2) (var r3))))
d "ldr r1, [r2, r3, lsl 4]" 031292e7 0x200 (set r1 (loadw 0 32 (+ (var r2) (<< (var r3) (bv 5 0x4) false))))
d "ldr r0, [r1, r4, lsr 5]" a40291e7 0x0 (set r0 (loadw 0 32 (+ (var r1) (>> (var r4) (bv 5 0x5) false))))
d "ldr r0, [r1, r4, asr 5]" c40291e7 0x0 (set r0 (loadw 0 32 (+ (var r1) (>> (var r4) (bv 5 0x5) (msb (var r4))))))
d "ldr r0, [r1, r4, ror 5]" e40291e7 0x0 (set r0 (loadw 0 32 (+ (var r1) (| (>> (var r4) (bv 5 0x5) false) (<< (var r4) (~- (bv 5 0x5)) false)))))
d "ldr r0, [r1, r4, rrx]" 640091e7 0x0 (set r0 (loadw 0 32 (+ (var r1) (>> (var r4) (bv 5 0x1) (var cf)))))
d "ldrb r2, [r3]" 0020d3e5 0x0 (set r2 (cast 32 false (load 0 (var r3))))
d "ldrsb r2, [r3]" d020d3e1 0x0 (set r2 (cast 32 (msb (load 0 (var r3))) (load 0 (var r3))))
d "ldrsbt r2, [r3], 0" d020f3e0 0x0 (seq (set r2 (cast 32 (msb (load 0 (var r3))) (load 0 (var r3)))) (set r3 (var r3)))
d "ldrh r0, [r1]" b000d1e1 0x0 (set r0 (cast 32 false (loadw 0 16 (var r1))))
d "ldrsh r4, [r2]" f040d2e1 0x0 (set r4 (cast 32 (msb (loadw 0 16 (var r2))) (loadw 0 16 (var r2))))
d "ldrsht r4, [r2], 0" f040f2e0 0x0 (seq (set r4 (cast 32 (msb (loadw 0 16 (var r2))) (loadw 0 16 (var r2)))) (set r2 (var r2)))
d "ldr r6, [pc, 0x48]" 48609fe5 0x10660 (set r6 (loadw 0 32 (bv 32 0x106b0)))
d "ldr r2, [pc, -0x10]" 10201fe5 0x1000 (set r2 (loadw 0 32 (bv 32 0xff8)))
d "ldr sb, [pc, r3]" 03909fe7 0x1000 (set r9 (loadw 0 32 (+ (bv 32 0x1008) (var r3))))
d "ldr r2, [fp, -0x10]!" 10203be5 0x0 (seq (set r11 (- (var r11) (bv 32 0x10))) (set r2 (loadw 0 32 (var r11))))
d "ldr r0, [r1], 4" 040091e4 0x0 (seq (set r0 (loadw 0 32 (var r1))) (set r1 (+ (var r1) (bv 32 0x4))))
d "ldrt r0, [r1], 0" 0000b1e4 0x0 (seq (set r0 (loadw 0 32 (var r1))) (set r1 (var r1)))
d "ldrt r0, [r1], 4" 0400b1e4 0x0 (seq (set r0 (loadw 0 32 (var r1))) (set r1 (+ (var r1) (bv 32 0x4))))
d "ldrbt r0, [r1], 4" 0400f1e4 0x0 (seq (set r0 (cast 32 false (load 0 (var r1)))) (set r1 (+ (var r1) (bv 32 0x4))))
d "ldrht r0, [r1], 4" b400f1e0 0x0 (seq (set r0 (cast 32 false (loadw 0 16 (var r1)))) (set r1 (+ (var r1) (bv 32 0x4))))
d "ldrht r0, [r1], -4" b40071e0 0x0 (seq (set r0 (cast 32 false (loadw 0 16 (var r1)))) (set r1 (- (var r1) (bv 32 0x4))))
d "ldr pc, [r1], 4" 04f091e4 0x0 (seq (set tgt (loadw 0 32 (var r1))) (set r1 (+ (var r1) (bv 32 0x4))) (jmp (var tgt)))
d "ldr pc, [r1], -4" 04f011e4 0x0 (seq (set tgt (loadw 0 32 (var r1))) (set r1 (- (var r1) (bv 32 0x4))) (jmp (var tgt)))
d "ldr pc, [r1, 4]" 04f091e5 0x0 (jmp (loadw 0 32 (+ (var r1) (bv 32 0x4))))
d "ldr pc, [r1, 4]!" 04f0b1e5 0x0 (seq (set r1 (+ (var r1) (bv 32 0x4))) (jmp (loadw 0 32 (var r1))))
d "ldr pc, [r1, -8]" 08f011e5 0x0 (jmp (loadw 0 32 (- (var r1) (bv 32 0x8))))
d "ldr pc, [r1, -8]!" 08f031e5 0x0 (seq (set r1 (- (var r1) (bv 32 0x8))) (jmp (loadw 0 32 (var r1))))
# requires capstone v5:
# d "lda r1, [r7]" 9f1c97e1 0x200 (set r1 (loadw 0 32 (var r7)))
# d "ldab r2, [r3]" 9f2cd3e1 0x0 (set r2 (cast 32 false (load 0 (var r3))))
# d "ldah r0, [r1]" 9f0cf1e1 0x0 (set r0 (cast 32 false (loadw 0 16 (var r1))))
# d "ldaex r0, [r1]" 9f0e91e1 0x0 (set r0 (loadw 0 32 (var r1)))
# d "ldaexb r0, [r1]" 9f0ed1e1 0x0 (set r0 (cast 32 false (load 0 (var r1))))
# d "ldaexh r0, [r1]" 9f0ef1e1 0x0 (set r0 (cast 32 false (loadw 0 16 (var r1))))
# d "stl r1, [r2]" 91fc82e1 0x0 (storew 0 (var r2) (var r1))
# d "stlb r1, [r2]" 91fcc2e1 0x0 (store 0 (var r2) (cast 8 false (var r1)))
# d "stlh r1, [r2]" 91fce2e1 0x0 (storew 0 (var r2) (cast 16 false (var r1)))
# d "stlex r1, r2, [r3]" 921e83e1 0x0 (seq (storew 0 (var r3) (var r2)) (set r1 (bv 32 0x1)))
# d "stlexb r1, r2, [r3]" 921ec3e1 0x0 (seq (store 0 (var r3) (cast 8 false (var r2))) (set r1 (bv 32 0x1)))
# d "stlexd r1, r2, r3, [r4]" 921ea4e1 0x0 (seq (storew 0 (var r4) (var r2)) (storew 0 (+ (var r4) (bv 32 0x4)) (var r3)) (set r1 (bv 32 0x1)))
# d "stlexh r1, r2, [r3]" 921ee3e1 0x0 (seq (storew 0 (var r3) (cast 16 false (var r2))) (set r1 (bv 32 0x1)))
d "strex r1, r2, [r3]" 921f83e1 0x0 (seq (storew 0 (var r3) (var r2)) (set r1 (bv 32 0x0)))
d "strexb r1, r2, [r3]" 921fc3e1 0x0 (seq (store 0 (var r3) (cast 8 false (var r2))) (set r1 (bv 32 0x0)))
d "strexd r1, r2, r3, [r3]" 921fa3e1 0x0 (seq (storew 0 (var r3) (var r2)) (storew 0 (+ (var r3) (bv 32 0x4)) (var r3)) (set r1 (bv 32 0x0)))
d "strexh r1, r2, [r3]" 921fe3e1 0x0 (seq (storew 0 (var r3) (cast 16 false (var r2))) (set r1 (bv 32 0x0)))
d "ldrex r3, [r5]" 9f3f95e1 0x0 (set r3 (loadw 0 32 (var r5)))
d "ldrd r2, r3, [fp]" d020cbe1 0x0 (seq (set r2 (loadw 0 32 (var r11))) (set r3 (loadw 0 32 (+ (var r11) (bv 32 0x4)))))
d "ldrexd r2, r3, [fp]" 9f2fbbe1 0x0 (seq (set r2 (loadw 0 32 (var r11))) (set r3 (loadw 0 32 (+ (var r11) (bv 32 0x4)))))
d "str fp, [sp, -4]!" 04b02de5 0x0 (seq (set sp (- (var sp) (bv 32 0x4))) (storew 0 (var sp) (var r11)))
d "str fp, [sp], 4" 04b08de4 0x0 (seq (storew 0 (var sp) (var r11)) (set sp (+ (var sp) (bv 32 0x4))))
d "str fp, [sp], -4" 04b00de4 0x0 (seq (storew 0 (var sp) (var r11)) (set sp (- (var sp) (bv 32 0x4))))
d "strt fp, [sp], -4" 04b02de4 0x0 (seq (storew 0 (var sp) (var r11)) (set sp (- (var sp) (bv 32 0x4))))
d "strt fp, [sp], 4" 04b0ade4 0x0 (seq (storew 0 (var sp) (var r11)) (set sp (+ (var sp) (bv 32 0x4))))
d "strbt fp, [sp], 4" 04b0ede4 0x0 (seq (store 0 (var sp) (cast 8 false (var r11))) (set sp (+ (var sp) (bv 32 0x4))))
d "strht fp, [sp], 4" b4b0ede0 0x0 (seq (storew 0 (var sp) (cast 16 false (var r11))) (set sp (+ (var sp) (bv 32 0x4))))
d "strd r4, r5, [r2]" f040c2e1 0x0 (seq (storew 0 (var r2) (var r4)) (storew 0 (+ (var r2) (bv 32 0x4)) (var r5)))
d "eor r4, r3, r2" 024023e0 0x0 (set r4 (^ (var r3) (var r2)))
d "eor r4, r3, 3" 034023e2 0x0 (set r4 (^ (var r3) (bv 32 0x3)))
d "eors r4, r3, 3" 034033e2 0x0 (seq (set r4 (^ (var r3) (bv 32 0x3))) (set zf (is_zero (var r4))) (set nf (msb (var r4))))
d "eors r4, r3, 0x30000" 034833e2 0x0 (seq (set r4 (^ (var r3) (bv 32 0x30000))) (set cf false) (set zf (is_zero (var r4))) (set nf (msb (var r4))))
d "eors r3, r3, 0x30000" 033833e2 0x0 (seq (set r3 (^ (var r3) (bv 32 0x30000))) (set cf false) (set zf (is_zero (var r3))) (set nf (msb (var r3))))
d "eors r3, r3, -0x80000000" 023133e2 0x0 (seq (set r3 (^ (var r3) (bv 32 0x80000000))) (set cf true) (set zf (is_zero (var r3))) (set nf (msb (var r3))))
d "and r0, r1, r2" 020001e0 0x0 (set r0 (& (var r1) (var r2)))
d "ands r0, r1, -0x80000000" 020111e2 0x0 (seq (set r0 (& (var r1) (bv 32 0x80000000))) (set cf true) (set zf (is_zero (var r0))) (set nf (msb (var r0))))
d "ands r0, r0, -0x80000000" 020110e2 0x0 (seq (set r0 (& (var r0) (bv 32 0x80000000))) (set cf true) (set zf (is_zero (var r0))) (set nf (msb (var r0))))
d "ands r0, r1, 0x42" 420011e2 0x0 (seq (set r0 (& (var r1) (bv 32 0x42))) (set zf (is_zero (var r0))) (set nf (msb (var r0))))
d "orr r0, r1, 0x42" 420081e3 0x0 (set r0 (| (var r1) (bv 32 0x42)))
d "orrs r0, r1, 0x42" 420091e3 0x0 (seq (set r0 (| (var r1) (bv 32 0x42))) (set zf (is_zero (var r0))) (set nf (msb (var r0))))
d "bic r4, r3, r2" 0240c3e1 0x0 (set r4 (& (var r3) (~ (var r2))))
d "bics r4, r3, r2" 0240d3e1 0x0 (seq (set r4 (& (var r3) (~ (var r2)))) (set zf (is_zero (var r4))) (set nf (msb (var r4))))
d "uxtb r1, r3" 7310efe6 0x0 (set r1 (cast 32 false (cast 8 false (var r3))))
d "uxtb r1, r3, ror 8" 7314efe6 0x0 (set r1 (cast 32 false (cast 8 false (| (>> (var r3) (bv 5 0x8) false) (<< (var r3) (~- (bv 5 0x8)) false)))))
d "uxth r1, r3" 7310ffe6 0x0 (set r1 (cast 32 false (cast 16 false (var r3))))
d "uxth r1, r3, ror 8" 7314ffe6 0x0 (set r1 (cast 32 false (cast 16 false (| (>> (var r3) (bv 5 0x8) false) (<< (var r3) (~- (bv 5 0x8)) false)))))
d "uxtab r1, r2, r3" 7310e2e6 0x0 (set r1 (+ (var r2) (cast 32 false (cast 8 false (var r3)))))
d "uxtab r1, r2, r3, ror 8" 7314e2e6 0x0 (set r1 (+ (var r2) (cast 32 false (cast 8 false (| (>> (var r3) (bv 5 0x8) false) (<< (var r3) (~- (bv 5 0x8)) false))))))
d "uxtah r1, r2, r3" 7310f2e6 0x0 (set r1 (+ (var r2) (cast 32 false (cast 16 false (var r3)))))
d "uxtah r1, r2, r3, ror 8" 7314f2e6 0x0 (set r1 (+ (var r2) (cast 32 false (cast 16 false (| (>> (var r3) (bv 5 0x8) false) (<< (var r3) (~- (bv 5 0x8)) false))))))
d "sxtb r1, r3" 7310afe6 0x0 (set r1 (cast 32 (msb (cast 8 false (var r3))) (cast 8 false (var r3))))
d "sxtb r1, r3, ror 8" 7314afe6 0x0 (set r1 (cast 32 (msb (cast 8 false (| (>> (var r3) (bv 5 0x8) false) (<< (var r3) (~- (bv 5 0x8)) false)))) (cast 8 false (| (>> (var r3) (bv 5 0x8) false) (<< (var r3) (~- (bv 5 0x8)) false)))))
d "sxth r1, r3" 7310bfe6 0x0 (set r1 (cast 32 (msb (cast 16 false (var r3))) (cast 16 false (var r3))))
d "sxtab r1, r2, r3" 7310a2e6 0x0 (set r1 (+ (var r2) (cast 32 (msb (cast 8 false (var r3))) (cast 8 false (var r3)))))
d "sxtah r1, r2, r3" 7310b2e6 0x0 (set r1 (+ (var r2) (cast 32 (msb (cast 16 false (var r3))) (cast 16 false (var r3)))))
d "uxtb16 r1, r3" 7310cfe6 0x0 (set r1 (let x (var r3) (append (cast 16 false (cast 8 false (>> (var x) (bv 5 0x10) false))) (cast 16 false (cast 8 false (var x))))))
d "uxtb16 r1, r3, ror 8" 7314cfe6 0x0 (set r1 (let x (| (>> (var r3) (bv 5 0x8) false) (<< (var r3) (~- (bv 5 0x8)) false)) (append (cast 16 false (cast 8 false (>> (var x) (bv 5 0x10) false))) (cast 16 false (cast 8 false (var x))))))
d "uxtab16 r1, r2, r3" 7310c2e6 0x0 (set r1 (let x (var r3) (append (+ (cast 16 false (>> (var r2) (bv 5 0x10) false)) (cast 16 false (cast 8 false (>> (var x) (bv 5 0x10) false)))) (+ (cast 16 false (var r2)) (cast 16 false (cast 8 false (var x)))))))
d "uxtab16 r1, r2, r3, ror 8" 7314c2e6 0x0 (set r1 (let x (| (>> (var r3) (bv 5 0x8) false) (<< (var r3) (~- (bv 5 0x8)) false)) (append (+ (cast 16 false (>> (var r2) (bv 5 0x10) false)) (cast 16 false (cast 8 false (>> (var x) (bv 5 0x10) false)))) (+ (cast 16 false (var r2)) (cast 16 false (cast 8 false (var x)))))))
d "sxtb16 r1, r3" 73108fe6 0x0 (set r1 (let x (var r3) (append (cast 16 (msb (cast 8 false (>> (var x) (bv 5 0x10) false))) (cast 8 false (>> (var x) (bv 5 0x10) false))) (cast 16 (msb (cast 8 false (var x))) (cast 8 false (var x))))))
d "sxtb16 r1, r3, ror 8" 73148fe6 0x0 (set r1 (let x (| (>> (var r3) (bv 5 0x8) false) (<< (var r3) (~- (bv 5 0x8)) false)) (append (cast 16 (msb (cast 8 false (>> (var x) (bv 5 0x10) false))) (cast 8 false (>> (var x) (bv 5 0x10) false))) (cast 16 (msb (cast 8 false (var x))) (cast 8 false (var x))))))
d "sxtab16 r1, r2, r3" 731082e6 0x0 (set r1 (let x (var r3) (append (+ (cast 16 false (>> (var r2) (bv 5 0x10) false)) (cast 16 (msb (cast 8 false (>> (var x) (bv 5 0x10) false))) (cast 8 false (>> (var x) (bv 5 0x10) false)))) (+ (cast 16 false (var r2)) (cast 16 (msb (cast 8 false (var x))) (cast 8 false (var x)))))))
d "cmp r1, 0x42" 420051e3 0x0 (seq (set a (var r1)) (set b (bv 32 0x42)) (set res (- (var a) (var b))) (set cf (ule (var b) (var a))) (set vf (&& (^^ (msb (var a)) (msb (var b))) (^^ (msb (var a)) (msb (var res))))) (set zf (is_zero (var res))) (set nf (msb (var res))))
d "cmn r1, 0x42" 420071e3 0x0 (seq (set a (var r1)) (set b (bv 32 0x42)) (set res (+ (var a) (var b))) (set cf (msb (+ (cast 33 false (var a)) (cast 33 false (var b))))) (set vf (&& (! (^^ (msb (var a)) (msb (var b)))) (^^ (msb (var a)) (msb (var res))))) (set zf (is_zero (var res))) (set nf (msb (var res))))
d "cmp r1, r3" 030051e1 0x0 (seq (set a (var r1)) (set b (var r3)) (set res (- (var a) (var b))) (set cf (ule (var b) (var a))) (set vf (&& (^^ (msb (var a)) (msb (var b))) (^^ (msb (var a)) (msb (var res))))) (set zf (is_zero (var res))) (set nf (msb (var res))))
ad "cmn r1, r3" 030071e1 0x0 (seq (set a (var r1)) (set b (var r3)) (set res (+ (var a) (var b))) (set cf (msb (+ (cast 33 false (var a)) (cast 33 false (var b))))) (set vf (&& (! (^^ (msb (var a)) (msb (var b)))) (^^ (msb (var a)) (msb (var res))))) (set zf (is_zero (var res))) (set nf (msb (var res))))
d "cmp r1, r3, ror 8" 630451e1 0x0 (seq (set a (var r1)) (set b (| (>> (var r3) (bv 5 0x8) false) (<< (var r3) (~- (bv 5 0x8)) false))) (set res (- (var a) (var b))) (set cf (ule (var b) (var a))) (set vf (&& (^^ (msb (var a)) (msb (var b))) (^^ (msb (var a)) (msb (var res))))) (set zf (is_zero (var res))) (set nf (msb (var res))))
d "cmn r1, r3, ror 8" 630471e1 0x0 (seq (set a (var r1)) (set b (| (>> (var r3) (bv 5 0x8) false) (<< (var r3) (~- (bv 5 0x8)) false))) (set res (+ (var a) (var b))) (set cf (msb (+ (cast 33 false (var a)) (cast 33 false (var b))))) (set vf (&& (! (^^ (msb (var a)) (msb (var b)))) (^^ (msb (var a)) (msb (var res))))) (set zf (is_zero (var res))) (set nf (msb (var res))))
d "str pc, [sp, -4]!" 04f02de5 0x200 (seq (set sp (- (var sp) (bv 32 0x4))) (storew 0 (var sp) (bv 32 0x208)))
d "str r3, [sp, -4]!" 04302de5 0x0 (seq (set sp (- (var sp) (bv 32 0x4))) (storew 0 (var sp) (var r3)))
d "push {fp, lr}" 00482de9 0x0 (seq (storew 0 (- (var sp) (bv 32 0x8)) (var r11)) (storew 0 (- (var sp) (bv 32 0x4)) (var lr)) (set sp (- (var sp) (bv 32 0x8))))
d "push {r4, r5, r6, r7, r8, sb, sl, lr}" f0472de9 0x0 (seq (storew 0 (- (var sp) (bv 32 0x20)) (var r4)) (storew 0 (- (var sp) (bv 32 0x1c)) (var r5)) (storew 0 (- (var sp) (bv 32 0x18)) (var r6)) (storew 0 (- (var sp) (bv 32 0x14)) (var r7)) (storew 0 (- (var sp) (bv 32 0x10)) (var r8)) (storew 0 (- (var sp) (bv 32 0xc)) (var r9)) (storew 0 (- (var sp) (bv 32 0x8)) (var r10)) (storew 0 (- (var sp) (bv 32 0x4)) (var lr)) (set sp (- (var sp) (bv 32 0x20))))
d "stm r0, {r1, r3, r4}" 1a0080e8 0x0 (seq (storew 0 (+ (var r0) (bv 32 0x0)) (var r1)) (storew 0 (+ (var r0) (bv 32 0x4)) (var r3)) (storew 0 (+ (var r0) (bv 32 0x8)) (var r4)))
d "stm r0!, {r1, r3, r4}" 1a00a0e8 0x0 (seq (storew 0 (+ (var r0) (bv 32 0x0)) (var r1)) (storew 0 (+ (var r0) (bv 32 0x4)) (var r3)) (storew 0 (+ (var r0) (bv 32 0x8)) (var r4)) (set r0 (+ (var r0) (bv 32 0xc))))
d "stmda r0, {r1, r3, r4}" 1a0000e8 0x0 (seq (storew 0 (- (var r0) (bv 32 0x8)) (var r1)) (storew 0 (- (var r0) (bv 32 0x4)) (var r3)) (storew 0 (- (var r0) (bv 32 0x0)) (var r4)))
d "stmda r0!, {r1, r3, r4}" 1a0020e8 0x0 (seq (storew 0 (- (var r0) (bv 32 0x8)) (var r1)) (storew 0 (- (var r0) (bv 32 0x4)) (var r3)) (storew 0 (- (var r0) (bv 32 0x0)) (var r4)) (set r0 (- (var r0) (bv 32 0xc))))
d "stmib r0, {r1, r3, r4}" 1a0080e9 0x0 (seq (storew 0 (+ (var r0) (bv 32 0x4)) (var r1)) (storew 0 (+ (var r0) (bv 32 0x8)) (var r3)) (storew 0 (+ (var r0) (bv 32 0xc)) (var r4)))
d "stmib r0!, {r1, r3, r4}" 1a00a0e9 0x0 (seq (storew 0 (+ (var r0) (bv 32 0x4)) (var r1)) (storew 0 (+ (var r0) (bv 32 0x8)) (var r3)) (storew 0 (+ (var r0) (bv 32 0xc)) (var r4)) (set r0 (+ (var r0) (bv 32 0xc))))
d "stmdb r0, {r1, r3, r4}" 1a0000e9 0x0 (seq (storew 0 (- (var r0) (bv 32 0xc)) (var r1)) (storew 0 (- (var r0) (bv 32 0x8)) (var r3)) (storew 0 (- (var r0) (bv 32 0x4)) (var r4)))
d "stmdb r0!, {r1, r3, r4}" 1a0020e9 0x0 (seq (storew 0 (- (var r0) (bv 32 0xc)) (var r1)) (storew 0 (- (var r0) (bv 32 0x8)) (var r3)) (storew 0 (- (var r0) (bv 32 0x4)) (var r4)) (set r0 (- (var r0) (bv 32 0xc))))
d "pop {fp}" 04b09de4 0x0 (seq (set r11 (loadw 0 32 (var sp))) (set sp (+ (var sp) (bv 32 0x4))))
d "pop {r3, pc}" 0880bde8 0x0 (seq (set base (var sp)) (set r3 (loadw 0 32 (+ (var base) (bv 32 0x0)))) (set tgt (loadw 0 32 (+ (var base) (bv 32 0x4)))) (set sp (+ (var base) (bv 32 0x8))) (jmp (var tgt)))
d "ldm r0, {r1, r3, r4}" 1a0090e8 0x0 (seq (set base (var r0)) (set r1 (loadw 0 32 (+ (var base) (bv 32 0x0)))) (set r3 (loadw 0 32 (+ (var base) (bv 32 0x4)))) (set r4 (loadw 0 32 (+ (var base) (bv 32 0x8)))))
d "ldm r0!, {r1, r3, r4}" 1a00b0e8 0x0 (seq (set base (var r0)) (set r1 (loadw 0 32 (+ (var base) (bv 32 0x0)))) (set r3 (loadw 0 32 (+ (var base) (bv 32 0x4)))) (set r4 (loadw 0 32 (+ (var base) (bv 32 0x8)))) (set r0 (+ (var base) (bv 32 0xc))))
d "ldmda r0, {r1, r3, r4}" 1a0010e8 0x0 (seq (set base (var r0)) (set r1 (loadw 0 32 (- (var base) (bv 32 0x8)))) (set r3 (loadw 0 32 (- (var base) (bv 32 0x4)))) (set r4 (loadw 0 32 (- (var base) (bv 32 0x0)))))
d "ldmda r0!, {r1, r3, r4}" 1a0030e8 0x0 (seq (set base (var r0)) (set r1 (loadw 0 32 (- (var base) (bv 32 0x8)))) (set r3 (loadw 0 32 (- (var base) (bv 32 0x4)))) (set r4 (loadw 0 32 (- (var base) (bv 32 0x0)))) (set r0 (- (var base) (bv 32 0xc))))
d "ldmdb r0, {r1, r3, r4}" 1a0010e9 0x0 (seq (set base (var r0)) (set r1 (loadw 0 32 (- (var base) (bv 32 0xc)))) (set r3 (loadw 0 32 (- (var base) (bv 32 0x8)))) (set r4 (loadw 0 32 (- (var base) (bv 32 0x4)))))
d "ldmdb r0!, {r1, r3, r4}" 1a0030e9 0x0 (seq (set base (var r0)) (set r1 (loadw 0 32 (- (var base) (bv 32 0xc)))) (set r3 (loadw 0 32 (- (var base) (bv 32 0x8)))) (set r4 (loadw 0 32 (- (var base) (bv 32 0x4)))) (set r0 (- (var base) (bv 32 0xc))))
d "ldmib r0, {r1, r3, r4}" 1a0090e9 0x0 (seq (set base (var r0)) (set r1 (loadw 0 32 (+ (var base) (bv 32 0x4)))) (set r3 (loadw 0 32 (+ (var base) (bv 32 0x8)))) (set r4 (loadw 0 32 (+ (var base) (bv 32 0xc)))))
d "ldmib r0!, {r1, r3, r4}" 1a00b0e9 0x0 (seq (set base (var r0)) (set r1 (loadw 0 32 (+ (var base) (bv 32 0x4)))) (set r3 (loadw 0 32 (+ (var base) (bv 32 0x8)))) (set r4 (loadw 0 32 (+ (var base) (bv 32 0xc)))) (set r0 (+ (var base) (bv 32 0xc))))
d "bx lr" 1eff2fe1 0x0 (jmp (var lr))
d "bxj r5" 25ff2fe1 0x0 (jmp (var r5))
d "blx 0xa" 000000fb 0x0 (seq (set lr (bv 32 0x4)) (jmp (bv 32 0xa)))
d "bl 0x100" 3e0000eb 0x0 (seq (set lr (bv 32 0x4)) (jmp (bv 32 0x100)))
d "lsr r0, r1, r3" 3103a0e1 0x0 (set r0 (>> (var r1) (cast 8 false (var r3)) false))
d "lsl r2, r8, r5" 1825a0e1 0x0 (set r2 (<< (var r8) (cast 8 false (var r5)) false))
d "lsl r2, r2, r8" 1228a0e1 0x0 (set r2 (<< (var r2) (cast 8 false (var r8)) false))
d "lsls r2, r2, r8" 1228b0e1 0x0 (seq (set cf_tmp (msb (<< (append (ite (var cf) (bv 1 0x1) (bv 1 0x0)) (var r2)) (cast 8 false (var r8)) false))) (set r2 (<< (var r2) (cast 8 false (var r8)) false)) (set cf (var cf_tmp)) (set zf (is_zero (var r2))) (set nf (msb (var r2))))
d "lsrs r2, r3, r8" 3328b0e1 0x0 (seq (set cf_tmp (lsb (>> (append (var r3) (ite (var cf) (bv 1 0x1) (bv 1 0x0))) (cast 8 false (var r8)) false))) (set r2 (>> (var r3) (cast 8 false (var r8)) false)) (set cf (var cf_tmp)) (set zf (is_zero (var r2))) (set nf (msb (var r2))))
d "asr r2, r7, r3" 5723a0e1 0x0 (set r2 (>> (var r7) (cast 8 false (var r3)) (msb (var r7))))
d "asrs r2, r7, r3" 5723b0e1 0x0 (seq (set cf_tmp (lsb (>> (append (var r7) (ite (var cf) (bv 1 0x1) (bv 1 0x0))) (cast 8 false (var r3)) (msb (append (var r7) (ite (var cf) (bv 1 0x1) (bv 1 0x0))))))) (set r2 (>> (var r7) (cast 8 false (var r3)) (msb (var r7)))) (set cf (var cf_tmp)) (set zf (is_zero (var r2))) (set nf (msb (var r2))))
d "ror r2, r7, r3" 7723a0e1 0x0 (set r2 (| (>> (var r7) (cast 5 false (var r3)) false) (<< (var r7) (~- (cast 5 false (var r3))) false)))
d "rors r2, r7, r3" 7723b0e1 0x0 (seq (set cf_tmp (ite (is_zero (cast 5 false (var r3))) (var cf) (msb (<< (var r7) (~- (cast 5 false (var r3))) false)))) (set r2 (| (>> (var r7) (cast 5 false (var r3)) false) (<< (var r7) (~- (cast 5 false (var r3))) false))) (set cf (var cf_tmp)) (set zf (is_zero (var r2))) (set nf (msb (var r2))))
d "rrx r2, r3" 6320a0e1 0x0 (set r2 (>> (var r3) (bv 5 0x1) (var cf)))
d "rrxs r2, r3" 6320b0e1 0x0 (seq (set cf_tmp (lsb (var r3))) (set r2 (>> (var r3) (bv 5 0x1) (var cf))) (set cf (var cf_tmp)) (set zf (is_zero (var r2))) (set nf (msb (var r2))))
d "lsr r1, r3, 31" a31fa0e1 0x0 (set r1 (>> (var r3) (bv 5 0x1f) false))
d "mvn r1, -0x70000000" 0912e0e3 0x0 (set r1 (~ (bv 32 0x90000000)))
d "mvns r1, -0x70000000" 0912f0e3 0x0 (seq (set cf_tmp true) (set r1 (~ (bv 32 0x90000000))) (set cf (var cf_tmp)) (set zf (is_zero (var r1))) (set nf (msb (var r1))))
ad "tst r1, r2" 020011e1 0x0 (seq (set zf (is_zero (& (var r1) (var r2)))) (set nf (msb (& (var r1) (var r2)))))
ad "tst ip, r3" 03001ce1 0x0 (seq (set zf (is_zero (& (var r12) (var r3)))) (set nf (msb (& (var r12) (var r3)))))
d "tst r0, r1, ror 16" 610810e1 0x0 (seq (set cf (ite (is_zero (bv 5 0x10)) (var cf) (msb (<< (var r1) (~- (bv 5 0x10)) false)))) (set zf (is_zero (& (var r0) (| (>> (var r1) (bv 5 0x10) false) (<< (var r1) (~- (bv 5 0x10)) false))))) (set nf (msb (& (var r0) (| (>> (var r1) (bv 5 0x10) false) (<< (var r1) (~- (bv 5 0x10)) false))))))
d "teq r1, r2" 020031e1 0x0 (seq (set zf (is_zero (| (var r1) (var r2)))) (set nf (msb (| (var r1) (var r2)))))
d "teq r1, -0x80000000" 020131e3 0x0 (seq (set cf true) (set zf (is_zero (| (var r1) (bv 32 0x80000000)))) (set nf (msb (| (var r1) (bv 32 0x80000000)))))
ad "clz r3, r2" 123f6fe1 0x0 (seq (set v (var r2)) (set i (bv 32 0x20)) (repeat (! (is_zero (var v))) (seq (set v (>> (var v) (bv 5 0x1) false)) (set i (- (var i) (bv 32 0x1))))) (set r3 (var i)))
ad "svc 0" 000000ef 0x0 (goto svc)
ad "bfc r3, 3, 5" 9f31c7e7 0x0 (set r3 (& (var r3) (bv 32 0xffffff07)))
ad "bfc r3, 0, 0x20" 1f30dfe7 0x0 (set r3 (& (var r3) (bv 32 0x0)))
ad "bfc r8, 0x1f, 1" 9f8fdfe7 0x0 (set r8 (& (var r8) (bv 32 0x7fffffff)))
ad "bfi r8, r4, 0, 0x20" 1480dfe7 0x0 (set r8 (| (& (var r8) (bv 32 0x0)) (<< (& (var r4) (bv 32 0xffffffff)) (bv 5 0x0) false)))
ad "bfi r2, lr, 4, 4" 1e22c7e7 0x0 (set r2 (| (& (var r2) (bv 32 0xffffff0f)) (<< (& (var lr) (bv 32 0xf)) (bv 5 0x4) false)))
d "dbg 3" f3f020e3 0x0 nop
d "hvc 3" 730040e1 0x0 (goto hvc)
d "mla r1, r2, r3, r4" 924321e0 0x0 (set r1 (+ (* (var r2) (var r3)) (var r4)))
d "mlas r1, r2, r3, r4" 924331e0 0x0 (seq (set r1 (+ (* (var r2) (var r3)) (var r4))) (set zf (is_zero (var r1))) (set nf (msb (var r1))))
d "mls r1, r2, r3, r4" 924361e0 0x0 (set r1 (- (var r4) (* (var r2) (var r3))))
d "mrs r2, apsr" 00200fe1 0x0 (set r2 (| (ite (var nf) (bv 32 0x80000000) (bv 32 0x0)) (| (ite (var zf) (bv 32 0x40000000) (bv 32 0x0)) (| (ite (var cf) (bv 32 0x20000000) (bv 32 0x0)) (| (ite (var vf) (bv 32 0x10000000) (bv 32 0x0)) (| (ite (var qf) (bv 32 0x8000000) (bv 32 0x0)) (<< (cast 32 false (var gef)) (bv 5 0x10) false)))))))
d "mrs r2, spsr" 00204fe1 0x0 (set r2 (| (ite (var nf) (bv 32 0x80000000) (bv 32 0x0)) (| (ite (var zf) (bv 32 0x40000000) (bv 32 0x0)) (| (ite (var cf) (bv 32 0x20000000) (bv 32 0x0)) (| (ite (var vf) (bv 32 0x10000000) (bv 32 0x0)) (| (ite (var qf) (bv 32 0x8000000) (bv 32 0x0)) (<< (cast 32 false (var gef)) (bv 5 0x10) false)))))))
d "msr apsr_nzcvq, r2" 02f028e1 0x0 (seq (set nf (! (is_zero (& (var r2) (bv 32 0x80000000))))) (set zf (! (is_zero (& (var r2) (bv 32 0x40000000))))) (set cf (! (is_zero (& (var r2) (bv 32 0x20000000))))) (set vf (! (is_zero (& (var r2) (bv 32 0x10000000))))) (set qf (! (is_zero (& (var r2) (bv 32 0x8000000))))))
d "msr cpsr_fc, r3" 03f029e1 0x0 (seq (set nf (! (is_zero (& (var r3) (bv 32 0x80000000))))) (set zf (! (is_zero (& (var r3) (bv 32 0x40000000))))) (set cf (! (is_zero (& (var r3) (bv 32 0x20000000))))) (set vf (! (is_zero (& (var r3) (bv 32 0x10000000))))) (set qf (! (is_zero (& (var r3) (bv 32 0x8000000))))))
d "msr spsr_fxc, r3" 03f06be1 0x0 (seq (set nf (! (is_zero (& (var r3) (bv 32 0x80000000))))) (set zf (! (is_zero (& (var r3) (bv 32 0x40000000))))) (set cf (! (is_zero (& (var r3) (bv 32 0x20000000))))) (set vf (! (is_zero (& (var r3) (bv 32 0x10000000))))) (set qf (! (is_zero (& (var r3) (bv 32 0x8000000))))))
d "msr apsr_g, r3" 03f024e1 0x0 (set gef (cast 4 false (>> (var r3) (bv 5 0x10) false)))
d "msr apsr_nzcvqg, r3" 03f02ce1 0x0 (seq (set gef (cast 4 false (>> (var r3) (bv 5 0x10) false))) (set nf (! (is_zero (& (var r3) (bv 32 0x80000000))))) (set zf (! (is_zero (& (var r3) (bv 32 0x40000000))))) (set cf (! (is_zero (& (var r3) (bv 32 0x20000000))))) (set vf (! (is_zero (& (var r3) (bv 32 0x10000000))))) (set qf (! (is_zero (& (var r3) (bv 32 0x8000000))))))
d "msr spsr_s, r3" 03f064e1 0x0 (set gef (cast 4 false (>> (var r3) (bv 5 0x10) false)))
d "msr spsr_fs, r3" 03f06ce1 0x0 (seq (set gef (cast 4 false (>> (var r3) (bv 5 0x10) false))) (set nf (! (is_zero (& (var r3) (bv 32 0x80000000))))) (set zf (! (is_zero (& (var r3) (bv 32 0x40000000))))) (set cf (! (is_zero (& (var r3) (bv 32 0x20000000))))) (set vf (! (is_zero (& (var r3) (bv 32 0x10000000))))) (set qf (! (is_zero (& (var r3) (bv 32 0x8000000))))))
d "msr spsr_fsx, r3" 03f06ee1 0x0 (seq (set gef (cast 4 false (>> (var r3) (bv 5 0x10) false))) (set nf (! (is_zero (& (var r3) (bv 32 0x80000000))))) (set zf (! (is_zero (& (var r3) (bv 32 0x40000000))))) (set cf (! (is_zero (& (var r3) (bv 32 0x20000000))))) (set vf (! (is_zero (& (var r3) (bv 32 0x10000000))))) (set qf (! (is_zero (& (var r3) (bv 32 0x8000000))))))
d "msr cpsr_sx, r3" 03f026e1 0x0 (set gef (cast 4 false (>> (var r3) (bv 5 0x10) false)))
d "pkhbt r0, r0, r1" 110080e6 0x0 (set r0 (append (cast 16 false (var r1)) (cast 16 false (>> (var r0) (bv 5 0x10) false))))
d "pkhbt r0, r2, r1, lsl 3" 910182e6 0x0 (set r0 (append (cast 16 false (<< (var r1) (bv 5 0x3) false)) (cast 16 false (>> (var r2) (bv 5 0x10) false))))
d "pkhtb r0, r2, r1, asr 3" d10182e6 0x0 (set r0 (append (cast 16 false (>> (var r2) (bv 5 0x10) false)) (cast 16 false (>> (var r1) (bv 5 0x3) (msb (var r1))))))
d "qadd r3, r3, r4" 533004e1 0x0 (seq (set er (+ (cast 33 (msb (var r3)) (var r3)) (cast 33 (msb (var r4)) (var r4)))) (branch (! (sle (var er) (bv 33 0x7fffffff))) (seq (set r (bv 32 0x7fffffff)) (set qf true)) (branch (&& (sle (var er) (bv 33 0x180000000)) (! (== (var er) (bv 33 0x180000000)))) (seq (set r (bv 32 0x80000000)) (set qf true)) (set r (cast 32 false (var er))))) (set r3 (var r)))
d "qsub r4, r5, r6" 554026e1 0x0 (seq (set er (- (cast 33 (msb (var r5)) (var r5)) (cast 33 (msb (var r6)) (var r6)))) (branch (! (sle (var er) (bv 33 0x7fffffff))) (seq (set r (bv 32 0x7fffffff)) (set qf true)) (branch (&& (sle (var er) (bv 33 0x180000000)) (! (== (var er) (bv 33 0x180000000)))) (seq (set r (bv 32 0x80000000)) (set qf true)) (set r (cast 32 false (var er))))) (set r4 (var r)))
d "qadd16 r4, r5, r6" 164f25e6 0x0 (seq (set er (+ (cast 17 (msb (cast 16 false (var r5))) (cast 16 false (var r5))) (cast 17 (msb (cast 16 false (var r6))) (cast 16 false (var r6))))) (branch (! (sle (var er) (bv 17 0x7fff))) (set rl (bv 16 0x7fff)) (branch (&& (sle (var er) (bv 17 0x18000)) (! (== (var er) (bv 17 0x18000)))) (set rl (bv 16 0x8000)) (set rl (cast 16 false (var er))))) (set er (+ (cast 17 (msb (cast 16 false (>> (var r5) (bv 5 0x10) false))) (cast 16 false (>> (var r5) (bv 5 0x10) false))) (cast 17 (msb (cast 16 false (>> (var r6) (bv 5 0x10) false))) (cast 16 false (>> (var r6) (bv 5 0x10) false))))) (branch (! (sle (var er) (bv 17 0x7fff))) (set rh (bv 16 0x7fff)) (branch (&& (sle (var er) (bv 17 0x18000)) (! (== (var er) (bv 17 0x18000)))) (set rh (bv 16 0x8000)) (set rh (cast 16 false (var er))))) (set r4 (append (var rh) (var rl))))
d "qsub16 r4, r5, r6" 764f25e6 0x0 (seq (set er (- (cast 17 (msb (cast 16 false (var r5))) (cast 16 false (var r5))) (cast 17 (msb (cast 16 false (var r6))) (cast 16 false (var r6))))) (branch (! (sle (var er) (bv 17 0x7fff))) (set rl (bv 16 0x7fff)) (branch (&& (sle (var er) (bv 17 0x18000)) (! (== (var er) (bv 17 0x18000)))) (set rl (bv 16 0x8000)) (set rl (cast 16 false (var er))))) (set er (- (cast 17 (msb (cast 16 false (>> (var r5) (bv 5 0x10) false))) (cast 16 false (>> (var r5) (bv 5 0x10) false))) (cast 17 (msb (cast 16 false (>> (var r6) (bv 5 0x10) false))) (cast 16 false (>> (var r6) (bv 5 0x10) false))))) (branch (! (sle (var er) (bv 17 0x7fff))) (set rh (bv 16 0x7fff)) (branch (&& (sle (var er) (bv 17 0x18000)) (! (== (var er) (bv 17 0x18000)))) (set rh (bv 16 0x8000)) (set rh (cast 16 false (var er))))) (set r4 (append (var rh) (var rl))))
d "uqadd16 r4, r5, r6" 164f65e6 0x0 (seq (set er (+ (cast 17 false (cast 16 false (var r5))) (cast 17 false (cast 16 false (var r6))))) (branch (! (ule (var er) (bv 17 0xffff))) (set rl (bv 16 0xffff)) (set rl (cast 16 false (var er)))) (set er (+ (cast 17 false (cast 16 false (>> (var r5) (bv 5 0x10) false))) (cast 17 false (cast 16 false (>> (var r6) (bv 5 0x10) false))))) (branch (! (ule (var er) (bv 17 0xffff))) (set rh (bv 16 0xffff)) (set rh (cast 16 false (var er)))) (set r4 (append (var rh) (var rl))))
d "uqsub16 r4, r5, r6" 764f65e6 0x0 (seq (set er (- (cast 17 false (cast 16 false (var r5))) (cast 17 false (cast 16 false (var r6))))) (branch (! (ule (var er) (bv 17 0xffff))) (set rl (bv 16 0x0)) (set rl (cast 16 false (var er)))) (set er (- (cast 17 false (cast 16 false (>> (var r5) (bv 5 0x10) false))) (cast 17 false (cast 16 false (>> (var r6) (bv 5 0x10) false))))) (branch (! (ule (var er) (bv 17 0xffff))) (set rh (bv 16 0x0)) (set rh (cast 16 false (var er)))) (set r4 (append (var rh) (var rl))))
d "qadd8 r4, r5, r6" 964f25e6 0x0 (seq (set er (+ (cast 9 (msb (cast 8 false (var r5))) (cast 8 false (var r5))) (cast 9 (msb (cast 8 false (var r6))) (cast 8 false (var r6))))) (branch (! (sle (var er) (bv 9 0x7f))) (set rb0 (bv 8 0x7f)) (branch (&& (sle (var er) (bv 9 0x180)) (! (== (var er) (bv 9 0x180)))) (set rb0 (bv 8 0x80)) (set rb0 (cast 8 false (var er))))) (set er (+ (cast 9 (msb (cast 8 false (>> (var r5) (bv 5 0x8) false))) (cast 8 false (>> (var r5) (bv 5 0x8) false))) (cast 9 (msb (cast 8 false (>> (var r6) (bv 5 0x8) false))) (cast 8 false (>> (var r6) (bv 5 0x8) false))))) (branch (! (sle (var er) (bv 9 0x7f))) (set rb1 (bv 8 0x7f)) (branch (&& (sle (var er) (bv 9 0x180)) (! (== (var er) (bv 9 0x180)))) (set rb1 (bv 8 0x80)) (set rb1 (cast 8 false (var er))))) (set er (+ (cast 9 (msb (cast 8 false (>> (var r5) (bv 5 0x10) false))) (cast 8 false (>> (var r5) (bv 5 0x10) false))) (cast 9 (msb (cast 8 false (>> (var r6) (bv 5 0x10) false))) (cast 8 false (>> (var r6) (bv 5 0x10) false))))) (branch (! (sle (var er) (bv 9 0x7f))) (set rb2 (bv 8 0x7f)) (branch (&& (sle (var er) (bv 9 0x180)) (! (== (var er) (bv 9 0x180)))) (set rb2 (bv 8 0x80)) (set rb2 (cast 8 false (var er))))) (set er (+ (cast 9 (msb (cast 8 false (>> (var r5) (bv 5 0x18) false))) (cast 8 false (>> (var r5) (bv 5 0x18) false))) (cast 9 (msb (cast 8 false (>> (var r6) (bv 5 0x18) false))) (cast 8 false (>> (var r6) (bv 5 0x18) false))))) (branch (! (sle (var er) (bv 9 0x7f))) (set rb3 (bv 8 0x7f)) (branch (&& (sle (var er) (bv 9 0x180)) (! (== (var er) (bv 9 0x180)))) (set rb3 (bv 8 0x80)) (set rb3 (cast 8 false (var er))))) (set r4 (append (append (var rb3) (var rb2)) (append (var rb1) (var rb0)))))
d "qsub8 r4, r5, r6" f64f25e6 0x0 (seq (set er (- (cast 9 (msb (cast 8 false (var r5))) (cast 8 false (var r5))) (cast 9 (msb (cast 8 false (var r6))) (cast 8 false (var r6))))) (branch (! (sle (var er) (bv 9 0x7f))) (set rb0 (bv 8 0x7f)) (branch (&& (sle (var er) (bv 9 0x180)) (! (== (var er) (bv 9 0x180)))) (set rb0 (bv 8 0x80)) (set rb0 (cast 8 false (var er))))) (set er (- (cast 9 (msb (cast 8 false (>> (var r5) (bv 5 0x8) false))) (cast 8 false (>> (var r5) (bv 5 0x8) false))) (cast 9 (msb (cast 8 false (>> (var r6) (bv 5 0x8) false))) (cast 8 false (>> (var r6) (bv 5 0x8) false))))) (branch (! (sle (var er) (bv 9 0x7f))) (set rb1 (bv 8 0x7f)) (branch (&& (sle (var er) (bv 9 0x180)) (! (== (var er) (bv 9 0x180)))) (set rb1 (bv 8 0x80)) (set rb1 (cast 8 false (var er))))) (set er (- (cast 9 (msb (cast 8 false (>> (var r5) (bv 5 0x10) false))) (cast 8 false (>> (var r5) (bv 5 0x10) false))) (cast 9 (msb (cast 8 false (>> (var r6) (bv 5 0x10) false))) (cast 8 false (>> (var r6) (bv 5 0x10) false))))) (branch (! (sle (var er) (bv 9 0x7f))) (set rb2 (bv 8 0x7f)) (branch (&& (sle (var er) (bv 9 0x180)) (! (== (var er) (bv 9 0x180)))) (set rb2 (bv 8 0x80)) (set rb2 (cast 8 false (var er))))) (set er (- (cast 9 (msb (cast 8 false (>> (var r5) (bv 5 0x18) false))) (cast 8 false (>> (var r5) (bv 5 0x18) false))) (cast 9 (msb (cast 8 false (>> (var r6) (bv 5 0x18) false))) (cast 8 false (>> (var r6) (bv 5 0x18) false))))) (branch (! (sle (var er) (bv 9 0x7f))) (set rb3 (bv 8 0x7f)) (branch (&& (sle (var er) (bv 9 0x180)) (! (== (var er) (bv 9 0x180)))) (set rb3 (bv 8 0x80)) (set rb3 (cast 8 false (var er))))) (set r4 (append (append (var rb3) (var rb2)) (append (var rb1) (var rb0)))))
d "uqadd8 r4, r5, r6" 964f65e6 0x0 (seq (set er (+ (cast 9 false (cast 8 false (var r5))) (cast 9 false (cast 8 false (var r6))))) (branch (! (ule (var er) (bv 9 0xff))) (set rb0 (bv 8 0xff)) (set rb0 (cast 8 false (var er)))) (set er (+ (cast 9 false (cast 8 false (>> (var r5) (bv 5 0x8) false))) (cast 9 false (cast 8 false (>> (var r6) (bv 5 0x8) false))))) (branch (! (ule (var er) (bv 9 0xff))) (set rb1 (bv 8 0xff)) (set rb1 (cast 8 false (var er)))) (set er (+ (cast 9 false (cast 8 false (>> (var r5) (bv 5 0x10) false))) (cast 9 false (cast 8 false (>> (var r6) (bv 5 0x10) false))))) (branch (! (ule (var er) (bv 9 0xff))) (set rb2 (bv 8 0xff)) (set rb2 (cast 8 false (var er)))) (set er (+ (cast 9 false (cast 8 false (>> (var r5) (bv 5 0x18) false))) (cast 9 false (cast 8 false (>> (var r6) (bv 5 0x18) false))))) (branch (! (ule (var er) (bv 9 0xff))) (set rb3 (bv 8 0xff)) (set rb3 (cast 8 false (var er)))) (set r4 (append (append (var rb3) (var rb2)) (append (var rb1) (var rb0)))))
d "uqsub8 r4, r5, r6" f64f65e6 0x0 (seq (set er (- (cast 9 false (cast 8 false (var r5))) (cast 9 false (cast 8 false (var r6))))) (branch (! (ule (var er) (bv 9 0xff))) (set rb0 (bv 8 0x0)) (set rb0 (cast 8 false (var er)))) (set er (- (cast 9 false (cast 8 false (>> (var r5) (bv 5 0x8) false))) (cast 9 false (cast 8 false (>> (var r6) (bv 5 0x8) false))))) (branch (! (ule (var er) (bv 9 0xff))) (set rb1 (bv 8 0x0)) (set rb1 (cast 8 false (var er)))) (set er (- (cast 9 false (cast 8 false (>> (var r5) (bv 5 0x10) false))) (cast 9 false (cast 8 false (>> (var r6) (bv 5 0x10) false))))) (branch (! (ule (var er) (bv 9 0xff))) (set rb2 (bv 8 0x0)) (set rb2 (cast 8 false (var er)))) (set er (- (cast 9 false (cast 8 false (>> (var r5) (bv 5 0x18) false))) (cast 9 false (cast 8 false (>> (var r6) (bv 5 0x18) false))))) (branch (! (ule (var er) (bv 9 0xff))) (set rb3 (bv 8 0x0)) (set rb3 (cast 8 false (var er)))) (set r4 (append (append (var rb3) (var rb2)) (append (var rb1) (var rb0)))))
d "qasx r4, r5, r6" 364f25e6 0x0 (seq (set er (- (cast 17 (msb (cast 16 false (var r5))) (cast 16 false (var r5))) (cast 17 (msb (cast 16 false (>> (var r6) (bv 5 0x10) false))) (cast 16 false (>> (var r6) (bv 5 0x10) false))))) (branch (! (sle (var er) (bv 17 0x7fff))) (set rl (bv 16 0x7fff)) (branch (&& (sle (var er) (bv 17 0x18000)) (! (== (var er) (bv 17 0x18000)))) (set rl (bv 16 0x8000)) (set rl (cast 16 false (var er))))) (set er (+ (cast 17 (msb (cast 16 false (>> (var r5) (bv 5 0x10) false))) (cast 16 false (>> (var r5) (bv 5 0x10) false))) (cast 17 (msb (cast 16 false (var r6))) (cast 16 false (var r6))))) (branch (! (sle (var er) (bv 17 0x7fff))) (set rh (bv 16 0x7fff)) (branch (&& (sle (var er) (bv 17 0x18000)) (! (== (var er) (bv 17 0x18000)))) (set rh (bv 16 0x8000)) (set rh (cast 16 false (var er))))) (set r4 (append (var rh) (var rl))))
d "qsax r4, r5, r6" 564f25e6 0x0 (seq (set er (+ (cast 17 (msb (cast 16 false (var r5))) (cast 16 false (var r5))) (cast 17 (msb (cast 16 false (>> (var r6) (bv 5 0x10) false))) (cast 16 false (>> (var r6) (bv 5 0x10) false))))) (branch (! (sle (var er) (bv 17 0x7fff))) (set rl (bv 16 0x7fff)) (branch (&& (sle (var er) (bv 17 0x18000)) (! (== (var er) (bv 17 0x18000)))) (set rl (bv 16 0x8000)) (set rl (cast 16 false (var er))))) (set er (- (cast 17 (msb (cast 16 false (>> (var r5) (bv 5 0x10) false))) (cast 16 false (>> (var r5) (bv 5 0x10) false))) (cast 17 (msb (cast 16 false (var r6))) (cast 16 false (var r6))))) (branch (! (sle (var er) (bv 17 0x7fff))) (set rh (bv 16 0x7fff)) (branch (&& (sle (var er) (bv 17 0x18000)) (! (== (var er) (bv 17 0x18000)))) (set rh (bv 16 0x8000)) (set rh (cast 16 false (var er))))) (set r4 (append (var rh) (var rl))))
d "uqasx r4, r5, r6" 364f65e6 0x0 (seq (set er (- (cast 17 false (cast 16 false (var r5))) (cast 17 false (cast 16 false (>> (var r6) (bv 5 0x10) false))))) (branch (! (ule (var er) (bv 17 0xffff))) (set rl (bv 16 0x0)) (set rl (cast 16 false (var er)))) (set er (+ (cast 17 false (cast 16 false (>> (var r5) (bv 5 0x10) false))) (cast 17 false (cast 16 false (var r6))))) (branch (! (ule (var er) (bv 17 0xffff))) (set rh (bv 16 0xffff)) (set rh (cast 16 false (var er)))) (set r4 (append (var rh) (var rl))))
d "uqsax r4, r5, r6" 564f65e6 0x0 (seq (set er (+ (cast 17 false (cast 16 false (var r5))) (cast 17 false (cast 16 false (>> (var r6) (bv 5 0x10) false))))) (branch (! (ule (var er) (bv 17 0xffff))) (set rl (bv 16 0xffff)) (set rl (cast 16 false (var er)))) (set er (- (cast 17 false (cast 16 false (>> (var r5) (bv 5 0x10) false))) (cast 17 false (cast 16 false (var r6))))) (branch (! (ule (var er) (bv 17 0xffff))) (set rh (bv 16 0x0)) (set rh (cast 16 false (var er)))) (set r4 (append (var rh) (var rl))))
d "qdadd r4, r5, r6" 554046e1 0x0 (seq (set er (+ (cast 33 (msb (var r6)) (var r6)) (cast 33 (msb (var r6)) (var r6)))) (branch (! (sle (var er) (bv 33 0x7fffffff))) (seq (set dbl (bv 32 0x7fffffff)) (set qf true)) (branch (&& (sle (var er) (bv 33 0x180000000)) (! (== (var er) (bv 33 0x180000000)))) (seq (set dbl (bv 32 0x80000000)) (set qf true)) (set dbl (cast 32 false (var er))))) (set er (+ (cast 33 (msb (var r5)) (var r5)) (cast 33 (msb (var dbl)) (var dbl)))) (branch (! (sle (var er) (bv 33 0x7fffffff))) (seq (set r (bv 32 0x7fffffff)) (set qf true)) (branch (&& (sle (var er) (bv 33 0x180000000)) (! (== (var er) (bv 33 0x180000000)))) (seq (set r (bv 32 0x80000000)) (set qf true)) (set r (cast 32 false (var er))))) (set r4 (var r)))
d "qdsub r4, r5, r6" 554066e1 0x0 (seq (set er (+ (cast 33 (msb (var r6)) (var r6)) (cast 33 (msb (var r6)) (var r6)))) (branch (! (sle (var er) (bv 33 0x7fffffff))) (seq (set dbl (bv 32 0x7fffffff)) (set qf true)) (branch (&& (sle (var er) (bv 33 0x180000000)) (! (== (var er) (bv 33 0x180000000)))) (seq (set dbl (bv 32 0x80000000)) (set qf true)) (set dbl (cast 32 false (var er))))) (set er (- (cast 33 (msb (var r5)) (var r5)) (cast 33 (msb (var dbl)) (var dbl)))) (branch (! (sle (var er) (bv 33 0x7fffffff))) (seq (set r (bv 32 0x7fffffff)) (set qf true)) (branch (&& (sle (var er) (bv 33 0x180000000)) (! (== (var er) (bv 33 0x180000000)))) (seq (set r (bv 32 0x80000000)) (set qf true)) (set r (cast 32 false (var er))))) (set r4 (var r)))
d "rbit r3, r4" 343fffe6 0x0 (seq (set v (var r4)) (set i (bv 32 0x20)) (set r (bv 32 0x0)) (repeat (! (is_zero (var v))) (seq (set i (- (var i) (bv 32 0x1))) (set r (| (var r) (ite (lsb (var v)) (<< (bv 32 0x1) (var i) false) (bv 32 0x0)))) (set v (>> (var v) (bv 5 0x1) false)))) (set r3 (var r)))
d "rev r3, r4" 343fbfe6 0x0 (set r3 (append (append (cast 8 false (var r4)) (cast 8 false (>> (var r4) (bv 5 0x8) false))) (append (cast 8 false (>> (var r4) (bv 5 0x10) false)) (cast 8 false (>> (var r4) (bv 5 0x18) false)))))
d "rev16 r3, r4" b43fbfe6 0x0 (set r3 (append (append (cast 8 false (>> (var r4) (bv 5 0x10) false)) (cast 8 false (>> (var r4) (bv 5 0x18) false))) (append (cast 8 false (var r4)) (cast 8 false (>> (var r4) (bv 5 0x8) false)))))
d "revsh r3, r4" b43fffe6 0x0 (set r3 (let r (append (cast 8 false (var r4)) (cast 8 false (>> (var r4) (bv 5 0x8) false))) (cast 32 (msb (var r)) (var r))))
d "rfeda r3" 000a13f8 0x0 (seq (set addr (+ (- (var r3) (bv 32 0x8)) (bv 32 0x4))) (set tgt (loadw 0 32 (var addr))) (set spsr (loadw 0 32 (+ (var addr) (bv 32 0x4)))) (set gef (cast 4 false (>> (var spsr) (bv 5 0x10) false))) (set nf (! (is_zero (& (var spsr) (bv 32 0x80000000))))) (set zf (! (is_zero (& (var spsr) (bv 32 0x40000000))))) (set cf (! (is_zero (& (var spsr) (bv 32 0x20000000))))) (set vf (! (is_zero (& (var spsr) (bv 32 0x10000000))))) (set qf (! (is_zero (& (var spsr) (bv 32 0x8000000))))) (jmp (var tgt)))
d "rfeda r3!" 000a33f8 0x0 (seq (set addr (+ (- (var r3) (bv 32 0x8)) (bv 32 0x4))) (set tgt (loadw 0 32 (var addr))) (set spsr (loadw 0 32 (+ (var addr) (bv 32 0x4)))) (set gef (cast 4 false (>> (var spsr) (bv 5 0x10) false))) (set nf (! (is_zero (& (var spsr) (bv 32 0x80000000))))) (set zf (! (is_zero (& (var spsr) (bv 32 0x40000000))))) (set cf (! (is_zero (& (var spsr) (bv 32 0x20000000))))) (set vf (! (is_zero (& (var spsr) (bv 32 0x10000000))))) (set qf (! (is_zero (& (var spsr) (bv 32 0x8000000))))) (set r3 (- (var r3) (bv 32 0x8))) (jmp (var tgt)))
d "rfedb r3" 000a13f9 0x0 (seq (set addr (- (var r3) (bv 32 0x8))) (set tgt (loadw 0 32 (var addr))) (set spsr (loadw 0 32 (+ (var addr) (bv 32 0x4)))) (set gef (cast 4 false (>> (var spsr) (bv 5 0x10) false))) (set nf (! (is_zero (& (var spsr) (bv 32 0x80000000))))) (set zf (! (is_zero (& (var spsr) (bv 32 0x40000000))))) (set cf (! (is_zero (& (var spsr) (bv 32 0x20000000))))) (set vf (! (is_zero (& (var spsr) (bv 32 0x10000000))))) (set qf (! (is_zero (& (var spsr) (bv 32 0x8000000))))) (jmp (var tgt)))
d "rfedb r3!" 000a33f9 0x0 (seq (set addr (- (var r3) (bv 32 0x8))) (set tgt (loadw 0 32 (var addr))) (set spsr (loadw 0 32 (+ (var addr) (bv 32 0x4)))) (set gef (cast 4 false (>> (var spsr) (bv 5 0x10) false))) (set nf (! (is_zero (& (var spsr) (bv 32 0x80000000))))) (set zf (! (is_zero (& (var spsr) (bv 32 0x40000000))))) (set cf (! (is_zero (& (var spsr) (bv 32 0x20000000))))) (set vf (! (is_zero (& (var spsr) (bv 32 0x10000000))))) (set qf (! (is_zero (& (var spsr) (bv 32 0x8000000))))) (set r3 (- (var r3) (bv 32 0x8))) (jmp (var tgt)))
d "rfeia r3" 000a93f8 0x0 (seq (set addr (var r3)) (set tgt (loadw 0 32 (var addr))) (set spsr (loadw 0 32 (+ (var addr) (bv 32 0x4)))) (set gef (cast 4 false (>> (var spsr) (bv 5 0x10) false))) (set nf (! (is_zero (& (var spsr) (bv 32 0x80000000))))) (set zf (! (is_zero (& (var spsr) (bv 32 0x40000000))))) (set cf (! (is_zero (& (var spsr) (bv 32 0x20000000))))) (set vf (! (is_zero (& (var spsr) (bv 32 0x10000000))))) (set qf (! (is_zero (& (var spsr) (bv 32 0x8000000))))) (jmp (var tgt)))
d "rfeia r3!" 000ab3f8 0x0 (seq (set addr (var r3)) (set tgt (loadw 0 32 (var addr))) (set spsr (loadw 0 32 (+ (var addr) (bv 32 0x4)))) (set gef (cast 4 false (>> (var spsr) (bv 5 0x10) false))) (set nf (! (is_zero (& (var spsr) (bv 32 0x80000000))))) (set zf (! (is_zero (& (var spsr) (bv 32 0x40000000))))) (set cf (! (is_zero (& (var spsr) (bv 32 0x20000000))))) (set vf (! (is_zero (& (var spsr) (bv 32 0x10000000))))) (set qf (! (is_zero (& (var spsr) (bv 32 0x8000000))))) (set r3 (+ (var r3) (bv 32 0x8))) (jmp (var tgt)))
d "rfeib r3" 000a93f9 0x0 (seq (set addr (+ (var r3) (bv 32 0x4))) (set tgt (loadw 0 32 (var addr))) (set spsr (loadw 0 32 (+ (var addr) (bv 32 0x4)))) (set gef (cast 4 false (>> (var spsr) (bv 5 0x10) false))) (set nf (! (is_zero (& (var spsr) (bv 32 0x80000000))))) (set zf (! (is_zero (& (var spsr) (bv 32 0x40000000))))) (set cf (! (is_zero (& (var spsr) (bv 32 0x20000000))))) (set vf (! (is_zero (& (var spsr) (bv 32 0x10000000))))) (set qf (! (is_zero (& (var spsr) (bv 32 0x8000000))))) (jmp (var tgt)))
d "rfeib r3!" 000ab3f9 0x0 (seq (set addr (+ (var r3) (bv 32 0x4))) (set tgt (loadw 0 32 (var addr))) (set spsr (loadw 0 32 (+ (var addr) (bv 32 0x4)))) (set gef (cast 4 false (>> (var spsr) (bv 5 0x10) false))) (set nf (! (is_zero (& (var spsr) (bv 32 0x80000000))))) (set zf (! (is_zero (& (var spsr) (bv 32 0x40000000))))) (set cf (! (is_zero (& (var spsr) (bv 32 0x20000000))))) (set vf (! (is_zero (& (var spsr) (bv 32 0x10000000))))) (set qf (! (is_zero (& (var spsr) (bv 32 0x8000000))))) (set r3 (+ (var r3) (bv 32 0x8))) (jmp (var tgt)))

d "sadd16 r0, r1, r2" 120f11e6 0x0 (seq (set res0 (+ (cast 17 (msb (cast 16 false (var r1))) (cast 16 false (var r1))) (cast 17 (msb (cast 16 false (var r2))) (cast 16 false (var r2))))) (set res1 (+ (cast 17 (msb (cast 16 false (>> (var r1) (bv 5 0x10) false))) (cast 16 false (>> (var r1) (bv 5 0x10) false))) (cast 17 (msb (cast 16 false (>> (var r2) (bv 5 0x10) false))) (cast 16 false (>> (var r2) (bv 5 0x10) false))))) (set gef (append (ite (msb (var res1)) (bv 2 0x0) (bv 2 0x3)) (ite (msb (var res0)) (bv 2 0x0) (bv 2 0x3)))) (set r0 (append (cast 16 false (var res1)) (cast 16 false (var res0)))))
d "sadd16 r1, r1, r2" 121f11e6 0x0 (seq (set res0 (+ (cast 17 (msb (cast 16 false (var r1))) (cast 16 false (var r1))) (cast 17 (msb (cast 16 false (var r2))) (cast 16 false (var r2))))) (set res1 (+ (cast 17 (msb (cast 16 false (>> (var r1) (bv 5 0x10) false))) (cast 16 false (>> (var r1) (bv 5 0x10) false))) (cast 17 (msb (cast 16 false (>> (var r2) (bv 5 0x10) false))) (cast 16 false (>> (var r2) (bv 5 0x10) false))))) (set gef (append (ite (msb (var res1)) (bv 2 0x0) (bv 2 0x3)) (ite (msb (var res0)) (bv 2 0x0) (bv 2 0x3)))) (set r1 (append (cast 16 false (var res1)) (cast 16 false (var res0)))))
d "shadd16 r1, r1, r2" 121f31e6 0x0 (seq (set res0 (+ (cast 17 (msb (cast 16 false (var r1))) (cast 16 false (var r1))) (cast 17 (msb (cast 16 false (var r2))) (cast 16 false (var r2))))) (set res1 (+ (cast 17 (msb (cast 16 false (>> (var r1) (bv 5 0x10) false))) (cast 16 false (>> (var r1) (bv 5 0x10) false))) (cast 17 (msb (cast 16 false (>> (var r2) (bv 5 0x10) false))) (cast 16 false (>> (var r2) (bv 5 0x10) false))))) (set r1 (append (cast 16 false (>> (var res1) (bv 4 0x1) (msb (var res1)))) (cast 16 false (>> (var res0) (bv 4 0x1) (msb (var res0)))))))
d "shadd16 r1, r3, r2" 121f33e6 0x0 (seq (set res0 (+ (cast 17 (msb (cast 16 false (var r3))) (cast 16 false (var r3))) (cast 17 (msb (cast 16 false (var r2))) (cast 16 false (var r2))))) (set res1 (+ (cast 17 (msb (cast 16 false (>> (var r3) (bv 5 0x10) false))) (cast 16 false (>> (var r3) (bv 5 0x10) false))) (cast 17 (msb (cast 16 false (>> (var r2) (bv 5 0x10) false))) (cast 16 false (>> (var r2) (bv 5 0x10) false))))) (set r1 (append (cast 16 false (>> (var res1) (bv 4 0x1) (msb (var res1)))) (cast 16 false (>> (var res0) (bv 4 0x1) (msb (var res0)))))))
d "sasx r1, r2, r3" 331f12e6 0x0 (seq (set res0 (- (cast 17 (msb (cast 16 false (var r2))) (cast 16 false (var r2))) (cast 17 (msb (cast 16 false (>> (var r3) (bv 5 0x10) false))) (cast 16 false (>> (var r3) (bv 5 0x10) false))))) (set res1 (+ (cast 17 (msb (cast 16 false (>> (var r2) (bv 5 0x10) false))) (cast 16 false (>> (var r2) (bv 5 0x10) false))) (cast 17 (msb (cast 16 false (var r3))) (cast 16 false (var r3))))) (set gef (append (ite (msb (var res1)) (bv 2 0x0) (bv 2 0x3)) (ite (msb (var res0)) (bv 2 0x0) (bv 2 0x3)))) (set r1 (append (cast 16 false (var res1)) (cast 16 false (var res0)))))
d "ssax r1, r2, r3" 531f12e6 0x0 (seq (set res0 (+ (cast 17 (msb (cast 16 false (var r2))) (cast 16 false (var r2))) (cast 17 (msb (cast 16 false (>> (var r3) (bv 5 0x10) false))) (cast 16 false (>> (var r3) (bv 5 0x10) false))))) (set res1 (- (cast 17 (msb (cast 16 false (>> (var r2) (bv 5 0x10) false))) (cast 16 false (>> (var r2) (bv 5 0x10) false))) (cast 17 (msb (cast 16 false (var r3))) (cast 16 false (var r3))))) (set gef (append (ite (msb (var res1)) (bv 2 0x0) (bv 2 0x3)) (ite (msb (var res0)) (bv 2 0x0) (bv 2 0x3)))) (set r1 (append (cast 16 false (var res1)) (cast 16 false (var res0)))))
d "shasx r1, r1, r2" 321f31e6 0x0 (seq (set res0 (+ (cast 17 (msb (cast 16 false (var r1))) (cast 16 false (var r1))) (cast 17 (msb (cast 16 false (>> (var r2) (bv 5 0x10) false))) (cast 16 false (>> (var r2) (bv 5 0x10) false))))) (set res1 (- (cast 17 (msb (cast 16 false (>> (var r1) (bv 5 0x10) false))) (cast 16 false (>> (var r1) (bv 5 0x10) false))) (cast 17 (msb (cast 16 false (var r2))) (cast 16 false (var r2))))) (set r1 (append (cast 16 false (>> (var res1) (bv 4 0x1) (msb (var res1)))) (cast 16 false (>> (var res0) (bv 4 0x1) (msb (var res0)))))))
d "shsax r1, r1, r2" 521f31e6 0x0 (seq (set res0 (- (cast 17 (msb (cast 16 false (var r1))) (cast 16 false (var r1))) (cast 17 (msb (cast 16 false (>> (var r2) (bv 5 0x10) false))) (cast 16 false (>> (var r2) (bv 5 0x10) false))))) (set res1 (+ (cast 17 (msb (cast 16 false (>> (var r1) (bv 5 0x10) false))) (cast 16 false (>> (var r1) (bv 5 0x10) false))) (cast 17 (msb (cast 16 false (var r2))) (cast 16 false (var r2))))) (set r1 (append (cast 16 false (>> (var res1) (bv 4 0x1) (msb (var res1)))) (cast 16 false (>> (var res0) (bv 4 0x1) (msb (var res0)))))))
d "ssub16 r1, r1, r3" 731f11e6 0x0 (seq (set res0 (- (cast 17 (msb (cast 16 false (var r1))) (cast 16 false (var r1))) (cast 17 (msb (cast 16 false (var r3))) (cast 16 false (var r3))))) (set res1 (- (cast 17 (msb (cast 16 false (>> (var r1) (bv 5 0x10) false))) (cast 16 false (>> (var r1) (bv 5 0x10) false))) (cast 17 (msb (cast 16 false (>> (var r3) (bv 5 0x10) false))) (cast 16 false (>> (var r3) (bv 5 0x10) false))))) (set gef (append (ite (msb (var res1)) (bv 2 0x0) (bv 2 0x3)) (ite (msb (var res0)) (bv 2 0x0) (bv 2 0x3)))) (set r1 (append (cast 16 false (var res1)) (cast 16 false (var res0)))))
d "shsub16 r1, r1, r3" 731f31e6 0x0 (seq (set res0 (- (cast 17 (msb (cast 16 false (var r1))) (cast 16 false (var r1))) (cast 17 (msb (cast 16 false (var r3))) (cast 16 false (var r3))))) (set res1 (- (cast 17 (msb (cast 16 false (>> (var r1) (bv 5 0x10) false))) (cast 16 false (>> (var r1) (bv 5 0x10) false))) (cast 17 (msb (cast 16 false (>> (var r3) (bv 5 0x10) false))) (cast 16 false (>> (var r3) (bv 5 0x10) false))))) (set r1 (append (cast 16 false (>> (var res1) (bv 4 0x1) (msb (var res1)))) (cast 16 false (>> (var res0) (bv 4 0x1) (msb (var res0)))))))

d "uadd16 r0, r1, r2" 120f51e6 0x0 (seq (set res0 (+ (cast 17 false (cast 16 false (var r1))) (cast 17 false (cast 16 false (var r2))))) (set res1 (+ (cast 17 false (cast 16 false (>> (var r1) (bv 5 0x10) false))) (cast 17 false (cast 16 false (>> (var r2) (bv 5 0x10) false))))) (set gef (append (ite (msb (var res1)) (bv 2 0x3) (bv 2 0x0)) (ite (msb (var res0)) (bv 2 0x3) (bv 2 0x0)))) (set r0 (append (cast 16 false (var res1)) (cast 16 false (var res0)))))
d "uadd16 r1, r1, r2" 121f51e6 0x0 (seq (set res0 (+ (cast 17 false (cast 16 false (var r1))) (cast 17 false (cast 16 false (var r2))))) (set res1 (+ (cast 17 false (cast 16 false (>> (var r1) (bv 5 0x10) false))) (cast 17 false (cast 16 false (>> (var r2) (bv 5 0x10) false))))) (set gef (append (ite (msb (var res1)) (bv 2 0x3) (bv 2 0x0)) (ite (msb (var res0)) (bv 2 0x3) (bv 2 0x0)))) (set r1 (append (cast 16 false (var res1)) (cast 16 false (var res0)))))
d "uhadd16 r1, r1, r2" 121f71e6 0x0 (seq (set res0 (+ (cast 17 false (cast 16 false (var r1))) (cast 17 false (cast 16 false (var r2))))) (set res1 (+ (cast 17 false (cast 16 false (>> (var r1) (bv 5 0x10) false))) (cast 17 false (cast 16 false (>> (var r2) (bv 5 0x10) false))))) (set r1 (append (cast 16 false (>> (var res1) (bv 4 0x1) (msb (var res1)))) (cast 16 false (>> (var res0) (bv 4 0x1) (msb (var res0)))))))
d "uhadd16 r1, r3, r2" 121f73e6 0x0 (seq (set res0 (+ (cast 17 false (cast 16 false (var r3))) (cast 17 false (cast 16 false (var r2))))) (set res1 (+ (cast 17 false (cast 16 false (>> (var r3) (bv 5 0x10) false))) (cast 17 false (cast 16 false (>> (var r2) (bv 5 0x10) false))))) (set r1 (append (cast 16 false (>> (var res1) (bv 4 0x1) (msb (var res1)))) (cast 16 false (>> (var res0) (bv 4 0x1) (msb (var res0)))))))
d "uasx r1, r2, r3" 331f52e6 0x0 (seq (set res0 (- (cast 17 false (cast 16 false (var r2))) (cast 17 false (cast 16 false (>> (var r3) (bv 5 0x10) false))))) (set res1 (+ (cast 17 false (cast 16 false (>> (var r2) (bv 5 0x10) false))) (cast 17 false (cast 16 false (var r3))))) (set gef (append (ite (msb (var res1)) (bv 2 0x3) (bv 2 0x0)) (ite (msb (var res0)) (bv 2 0x3) (bv 2 0x0)))) (set r1 (append (cast 16 false (var res1)) (cast 16 false (var res0)))))
d "usax r1, r2, r3" 531f52e6 0x0 (seq (set res0 (+ (cast 17 false (cast 16 false (var r2))) (cast 17 false (cast 16 false (>> (var r3) (bv 5 0x10) false))))) (set res1 (- (cast 17 false (cast 16 false (>> (var r2) (bv 5 0x10) false))) (cast 17 false (cast 16 false (var r3))))) (set gef (append (ite (msb (var res1)) (bv 2 0x3) (bv 2 0x0)) (ite (msb (var res0)) (bv 2 0x3) (bv 2 0x0)))) (set r1 (append (cast 16 false (var res1)) (cast 16 false (var res0)))))
d "uhasx r1, r1, r2" 321f71e6 0x0 (seq (set res0 (+ (cast 17 false (cast 16 false (var r1))) (cast 17 false (cast 16 false (>> (var r2) (bv 5 0x10) false))))) (set res1 (- (cast 17 false (cast 16 false (>> (var r1) (bv 5 0x10) false))) (cast 17 false (cast 16 false (var r2))))) (set r1 (append (cast 16 false (>> (var res1) (bv 4 0x1) (msb (var res1)))) (cast 16 false (>> (var res0) (bv 4 0x1) (msb (var res0)))))))
d "uhsax r1, r1, r2" 521f71e6 0x0 (seq (set res0 (- (cast 17 false (cast 16 false (var r1))) (cast 17 false (cast 16 false (>> (var r2) (bv 5 0x10) false))))) (set res1 (+ (cast 17 false (cast 16 false (>> (var r1) (bv 5 0x10) false))) (cast 17 false (cast 16 false (var r2))))) (set r1 (append (cast 16 false (>> (var res1) (bv 4 0x1) (msb (var res1)))) (cast 16 false (>> (var res0) (bv 4 0x1) (msb (var res0)))))))
d "usub16 r1, r1, r3" 731f51e6 0x0 (seq (set res0 (- (cast 17 false (cast 16 false (var r1))) (cast 17 false (cast 16 false (var r3))))) (set res1 (- (cast 17 false (cast 16 false (>> (var r1) (bv 5 0x10) false))) (cast 17 false (cast 16 false (>> (var r3) (bv 5 0x10) false))))) (set gef (append (ite (msb (var res1)) (bv 2 0x3) (bv 2 0x0)) (ite (msb (var res0)) (bv 2 0x3) (bv 2 0x0)))) (set r1 (append (cast 16 false (var res1)) (cast 16 false (var res0)))))
d "uhsub16 r1, r1, r3" 731f71e6 0x0 (seq (set res0 (- (cast 17 false (cast 16 false (var r1))) (cast 17 false (cast 16 false (var r3))))) (set res1 (- (cast 17 false (cast 16 false (>> (var r1) (bv 5 0x10) false))) (cast 17 false (cast 16 false (>> (var r3) (bv 5 0x10) false))))) (set r1 (append (cast 16 false (>> (var res1) (bv 4 0x1) (msb (var res1)))) (cast 16 false (>> (var res0) (bv 4 0x1) (msb (var res0)))))))

d "sadd8 r1, r2, r3" 931f12e6 0x0 (seq (set res0 (+ (cast 9 (msb (cast 8 false (var r2))) (cast 8 false (var r2))) (cast 9 (msb (cast 8 false (var r3))) (cast 8 false (var r3))))) (set res1 (+ (cast 9 (msb (cast 8 false (>> (var r2) (bv 5 0x8) false))) (cast 8 false (>> (var r2) (bv 5 0x8) false))) (cast 9 (msb (cast 8 false (>> (var r3) (bv 5 0x8) false))) (cast 8 false (>> (var r3) (bv 5 0x8) false))))) (set res2 (+ (cast 9 (msb (cast 8 false (>> (var r2) (bv 5 0x10) false))) (cast 8 false (>> (var r2) (bv 5 0x10) false))) (cast 9 (msb (cast 8 false (>> (var r3) (bv 5 0x10) false))) (cast 8 false (>> (var r3) (bv 5 0x10) false))))) (set res3 (+ (cast 9 (msb (cast 8 false (>> (var r2) (bv 5 0x18) false))) (cast 8 false (>> (var r2) (bv 5 0x18) false))) (cast 9 (msb (cast 8 false (>> (var r3) (bv 5 0x18) false))) (cast 8 false (>> (var r3) (bv 5 0x18) false))))) (set gef (append (append (ite (msb (var res3)) (bv 1 0x0) (bv 1 0x1)) (ite (msb (var res2)) (bv 1 0x0) (bv 1 0x1))) (append (ite (msb (var res1)) (bv 1 0x0) (bv 1 0x1)) (ite (msb (var res0)) (bv 1 0x0) (bv 1 0x1))))) (set r1 (append (append (cast 8 false (var res3)) (cast 8 false (var res2))) (append (cast 8 false (var res1)) (cast 8 false (var res0))))))
d "shadd8 r1, r1, r2" 921f31e6 0x0 (seq (set res0 (+ (cast 8 false (var r1)) (cast 8 false (var r2)))) (set res1 (+ (cast 8 false (>> (var r1) (bv 5 0x8) false)) (cast 8 false (>> (var r2) (bv 5 0x8) false)))) (set res2 (+ (cast 8 false (>> (var r1) (bv 5 0x10) false)) (cast 8 false (>> (var r2) (bv 5 0x10) false)))) (set res3 (+ (cast 8 false (>> (var r1) (bv 5 0x18) false)) (cast 8 false (>> (var r2) (bv 5 0x18) false)))) (set r1 (append (append (>> (var res3) (bv 3 0x1) (msb (var res3))) (>> (var res2) (bv 3 0x1) (msb (var res2)))) (append (>> (var res1) (bv 3 0x1) (msb (var res1))) (>> (var res0) (bv 3 0x1) (msb (var res0)))))))
d "shadd8 r1, r3, r2" 921f33e6 0x0 (seq (set res0 (+ (cast 8 false (var r3)) (cast 8 false (var r2)))) (set res1 (+ (cast 8 false (>> (var r3) (bv 5 0x8) false)) (cast 8 false (>> (var r2) (bv 5 0x8) false)))) (set res2 (+ (cast 8 false (>> (var r3) (bv 5 0x10) false)) (cast 8 false (>> (var r2) (bv 5 0x10) false)))) (set res3 (+ (cast 8 false (>> (var r3) (bv 5 0x18) false)) (cast 8 false (>> (var r2) (bv 5 0x18) false)))) (set r1 (append (append (>> (var res3) (bv 3 0x1) (msb (var res3))) (>> (var res2) (bv 3 0x1) (msb (var res2)))) (append (>> (var res1) (bv 3 0x1) (msb (var res1))) (>> (var res0) (bv 3 0x1) (msb (var res0)))))))
d "ssub8 r1, r1, r3" f31f11e6 0x0 (seq (set res0 (- (cast 9 (msb (cast 8 false (var r1))) (cast 8 false (var r1))) (cast 9 (msb (cast 8 false (var r3))) (cast 8 false (var r3))))) (set res1 (- (cast 9 (msb (cast 8 false (>> (var r1) (bv 5 0x8) false))) (cast 8 false (>> (var r1) (bv 5 0x8) false))) (cast 9 (msb (cast 8 false (>> (var r3) (bv 5 0x8) false))) (cast 8 false (>> (var r3) (bv 5 0x8) false))))) (set res2 (- (cast 9 (msb (cast 8 false (>> (var r1) (bv 5 0x10) false))) (cast 8 false (>> (var r1) (bv 5 0x10) false))) (cast 9 (msb (cast 8 false (>> (var r3) (bv 5 0x10) false))) (cast 8 false (>> (var r3) (bv 5 0x10) false))))) (set res3 (- (cast 9 (msb (cast 8 false (>> (var r1) (bv 5 0x18) false))) (cast 8 false (>> (var r1) (bv 5 0x18) false))) (cast 9 (msb (cast 8 false (>> (var r3) (bv 5 0x18) false))) (cast 8 false (>> (var r3) (bv 5 0x18) false))))) (set gef (append (append (ite (msb (var res3)) (bv 1 0x0) (bv 1 0x1)) (ite (msb (var res2)) (bv 1 0x0) (bv 1 0x1))) (append (ite (msb (var res1)) (bv 1 0x0) (bv 1 0x1)) (ite (msb (var res0)) (bv 1 0x0) (bv 1 0x1))))) (set r1 (append (append (cast 8 false (var res3)) (cast 8 false (var res2))) (append (cast 8 false (var res1)) (cast 8 false (var res0))))))
d "shsub8 r1, r1, r3" f31f31e6 0x0 (seq (set res0 (- (cast 8 false (var r1)) (cast 8 false (var r3)))) (set res1 (- (cast 8 false (>> (var r1) (bv 5 0x8) false)) (cast 8 false (>> (var r3) (bv 5 0x8) false)))) (set res2 (- (cast 8 false (>> (var r1) (bv 5 0x10) false)) (cast 8 false (>> (var r3) (bv 5 0x10) false)))) (set res3 (- (cast 8 false (>> (var r1) (bv 5 0x18) false)) (cast 8 false (>> (var r3) (bv 5 0x18) false)))) (set r1 (append (append (>> (var res3) (bv 3 0x1) (msb (var res3))) (>> (var res2) (bv 3 0x1) (msb (var res2)))) (append (>> (var res1) (bv 3 0x1) (msb (var res1))) (>> (var res0) (bv 3 0x1) (msb (var res0)))))))

d "uadd8 r1, r2, r3" 931f52e6 0x0 (seq (set res0 (+ (cast 9 false (cast 8 false (var r2))) (cast 9 false (cast 8 false (var r3))))) (set res1 (+ (cast 9 false (cast 8 false (>> (var r2) (bv 5 0x8) false))) (cast 9 false (cast 8 false (>> (var r3) (bv 5 0x8) false))))) (set res2 (+ (cast 9 false (cast 8 false (>> (var r2) (bv 5 0x10) false))) (cast 9 false (cast 8 false (>> (var r3) (bv 5 0x10) false))))) (set res3 (+ (cast 9 false (cast 8 false (>> (var r2) (bv 5 0x18) false))) (cast 9 false (cast 8 false (>> (var r3) (bv 5 0x18) false))))) (set gef (append (append (ite (msb (var res3)) (bv 1 0x1) (bv 1 0x0)) (ite (msb (var res2)) (bv 1 0x1) (bv 1 0x0))) (append (ite (msb (var res1)) (bv 1 0x1) (bv 1 0x0)) (ite (msb (var res0)) (bv 1 0x1) (bv 1 0x0))))) (set r1 (append (append (cast 8 false (var res3)) (cast 8 false (var res2))) (append (cast 8 false (var res1)) (cast 8 false (var res0))))))
d "uhadd8 r1, r2, r3" 931f72e6 0x0 (seq (set res0 (+ (cast 8 false (var r2)) (cast 8 false (var r3)))) (set res1 (+ (cast 8 false (>> (var r2) (bv 5 0x8) false)) (cast 8 false (>> (var r3) (bv 5 0x8) false)))) (set res2 (+ (cast 8 false (>> (var r2) (bv 5 0x10) false)) (cast 8 false (>> (var r3) (bv 5 0x10) false)))) (set res3 (+ (cast 8 false (>> (var r2) (bv 5 0x18) false)) (cast 8 false (>> (var r3) (bv 5 0x18) false)))) (set r1 (append (append (>> (var res3) (bv 3 0x1) (msb (var res3))) (>> (var res2) (bv 3 0x1) (msb (var res2)))) (append (>> (var res1) (bv 3 0x1) (msb (var res1))) (>> (var res0) (bv 3 0x1) (msb (var res0)))))))
d "usub8 r1, r2, r3" f31f52e6 0x0 (seq (set res0 (- (cast 9 false (cast 8 false (var r2))) (cast 9 false (cast 8 false (var r3))))) (set res1 (- (cast 9 false (cast 8 false (>> (var r2) (bv 5 0x8) false))) (cast 9 false (cast 8 false (>> (var r3) (bv 5 0x8) false))))) (set res2 (- (cast 9 false (cast 8 false (>> (var r2) (bv 5 0x10) false))) (cast 9 false (cast 8 false (>> (var r3) (bv 5 0x10) false))))) (set res3 (- (cast 9 false (cast 8 false (>> (var r2) (bv 5 0x18) false))) (cast 9 false (cast 8 false (>> (var r3) (bv 5 0x18) false))))) (set gef (append (append (ite (msb (var res3)) (bv 1 0x1) (bv 1 0x0)) (ite (msb (var res2)) (bv 1 0x1) (bv 1 0x0))) (append (ite (msb (var res1)) (bv 1 0x1) (bv 1 0x0)) (ite (msb (var res0)) (bv 1 0x1) (bv 1 0x0))))) (set r1 (append (append (cast 8 false (var res3)) (cast 8 false (var res2))) (append (cast 8 false (var res1)) (cast 8 false (var res0))))))
d "uhsub8 r1, r2, r3" f31f72e6 0x0 (seq (set res0 (- (cast 8 false (var r2)) (cast 8 false (var r3)))) (set res1 (- (cast 8 false (>> (var r2) (bv 5 0x8) false)) (cast 8 false (>> (var r3) (bv 5 0x8) false)))) (set res2 (- (cast 8 false (>> (var r2) (bv 5 0x10) false)) (cast 8 false (>> (var r3) (bv 5 0x10) false)))) (set res3 (- (cast 8 false (>> (var r2) (bv 5 0x18) false)) (cast 8 false (>> (var r3) (bv 5 0x18) false)))) (set r1 (append (append (>> (var res3) (bv 3 0x1) (msb (var res3))) (>> (var res2) (bv 3 0x1) (msb (var res2)))) (append (>> (var res1) (bv 3 0x1) (msb (var res1))) (>> (var res0) (bv 3 0x1) (msb (var res0)))))))

d "sbfx r3, r4, 3, 5" d431a4e7 0x0 (set r3 (cast 32 (msb (cast 5 false (>> (var r4) (bv 5 0x3) false))) (cast 5 false (>> (var r4) (bv 5 0x3) false))))
d "ubfx r3, r4, 3, 5" d431e4e7 0x0 (set r3 (cast 32 false (cast 5 false (>> (var r4) (bv 5 0x3) false))))
d "sdiv r0, r0, r1" 10f110e7 0x0 (set r0 (ite (== (var r1) (bv 32 0x0)) (bv 32 0x0) (ite (&& (== (var r0) (bv 32 0x80000000)) (== (var r1) (bv 32 0xffffffff))) (bv 32 0x80000000) (sdiv (var r0) (var r1)))))
d "sdiv r1, r2, r3" 12f311e7 0x0 (set r1 (ite (== (var r3) (bv 32 0x0)) (bv 32 0x0) (ite (&& (== (var r2) (bv 32 0x80000000)) (== (var r3) (bv 32 0xffffffff))) (bv 32 0x80000000) (sdiv (var r2) (var r3)))))
d "udiv r1, r2, r3" 12f331e7 0x0 (set r1 (ite (== (var r3) (bv 32 0x0)) (bv 32 0x0) (div (var r2) (var r3))))
d "sel r1, r1, r2" b21f81e6 0x0 (set r1 (append (append (cast 8 false (>> (ite (is_zero (& (var gef) (bv 4 0x8))) (var r2) (var r1)) (bv 5 0x18) false)) (cast 8 false (>> (ite (is_zero (& (var gef) (bv 4 0x4))) (var r2) (var r1)) (bv 5 0x10) false))) (append (cast 8 false (>> (ite (is_zero (& (var gef) (bv 4 0x2))) (var r2) (var r1)) (bv 5 0x8) false)) (cast 8 false (ite (is_zero (& (var gef) (bv 4 0x1))) (var r2) (var r1))))))
d "sel r3, r1, r2" b23f81e6 0x0 (set r3 (append (append (cast 8 false (>> (ite (is_zero (& (var gef) (bv 4 0x8))) (var r2) (var r1)) (bv 5 0x18) false)) (cast 8 false (>> (ite (is_zero (& (var gef) (bv 4 0x4))) (var r2) (var r1)) (bv 5 0x10) false))) (append (cast 8 false (>> (ite (is_zero (& (var gef) (bv 4 0x2))) (var r2) (var r1)) (bv 5 0x8) false)) (cast 8 false (ite (is_zero (& (var gef) (bv 4 0x1))) (var r2) (var r1))))))
d "smlabb r0, r1, r2, r3" 813200e1 0x0 (seq (set res (+ (* (cast 33 (msb (cast 16 false (var r1))) (cast 16 false (var r1))) (cast 33 (msb (cast 16 false (var r2))) (cast 16 false (var r2)))) (cast 33 (msb (var r3)) (var r3)))) (set r0 (cast 32 false (var res))) (branch (! (== (var res) (cast 33 (msb (var r0)) (var r0)))) (set qf true) nop))
d "smlabt r0, r0, r2, r3" c03200e1 0x0 (seq (set res (+ (* (cast 33 (msb (cast 16 false (var r0))) (cast 16 false (var r0))) (cast 33 (msb (cast 16 false (>> (var r2) (bv 5 0x10) false))) (cast 16 false (>> (var r2) (bv 5 0x10) false)))) (cast 33 (msb (var r3)) (var r3)))) (set r0 (cast 32 false (var res))) (branch (! (== (var res) (cast 33 (msb (var r0)) (var r0)))) (set qf true) nop))
d "smlatb r0, r1, r2, r3" a13200e1 0x0 (seq (set res (+ (* (cast 33 (msb (cast 16 false (>> (var r1) (bv 5 0x10) false))) (cast 16 false (>> (var r1) (bv 5 0x10) false))) (cast 33 (msb (cast 16 false (var r2))) (cast 16 false (var r2)))) (cast 33 (msb (var r3)) (var r3)))) (set r0 (cast 32 false (var res))) (branch (! (== (var res) (cast 33 (msb (var r0)) (var r0)))) (set qf true) nop))
d "smlatt r0, r1, r2, r3" e13200e1 0x0 (seq (set res (+ (* (cast 33 (msb (cast 16 false (>> (var r1) (bv 5 0x10) false))) (cast 16 false (>> (var r1) (bv 5 0x10) false))) (cast 33 (msb (cast 16 false (>> (var r2) (bv 5 0x10) false))) (cast 16 false (>> (var r2) (bv 5 0x10) false)))) (cast 33 (msb (var r3)) (var r3)))) (set r0 (cast 32 false (var res))) (branch (! (== (var res) (cast 33 (msb (var r0)) (var r0)))) (set qf true) nop))
d "smlad r0, r1, r2, r3" 113200e7 0x0 (seq (set res (+ (+ (* (cast 34 (msb (cast 16 false (var r1))) (cast 16 false (var r1))) (cast 34 (msb (cast 16 false (var r2))) (cast 16 false (var r2)))) (* (cast 34 (msb (cast 16 false (>> (var r1) (bv 5 0x10) false))) (cast 16 false (>> (var r1) (bv 5 0x10) false))) (cast 34 (msb (cast 16 false (>> (var r2) (bv 5 0x10) false))) (cast 16 false (>> (var r2) (bv 5 0x10) false))))) (cast 34 (msb (var r3)) (var r3)))) (set r0 (cast 32 false (var res))) (branch (! (== (var res) (cast 34 (msb (var r0)) (var r0)))) (set qf true) nop))
d "smladx r0, r1, r2, r3" 313200e7 0x0 (seq (set res (+ (+ (* (cast 34 (msb (cast 16 false (var r1))) (cast 16 false (var r1))) (cast 34 (msb (cast 16 false (>> (var r2) (bv 5 0x10) false))) (cast 16 false (>> (var r2) (bv 5 0x10) false)))) (* (cast 34 (msb (cast 16 false (>> (var r1) (bv 5 0x10) false))) (cast 16 false (>> (var r1) (bv 5 0x10) false))) (cast 34 (msb (cast 16 false (var r2))) (cast 16 false (var r2))))) (cast 34 (msb (var r3)) (var r3)))) (set r0 (cast 32 false (var res))) (branch (! (== (var res) (cast 34 (msb (var r0)) (var r0)))) (set qf true) nop))
d "smlal r0, r1, r2, r3" 9203e1e0 0x0 (seq (set res (+ (* (cast 64 (msb (var r2)) (var r2)) (cast 64 (msb (var r3)) (var r3))) (append (var r1) (var r0)))) (set r0 (cast 32 false (var res))) (set r1 (cast 32 false (>> (var res) (bv 6 0x20) false))))
d "smlals r0, r1, r2, r3" 9203f1e0 0x0 (seq (set res (+ (* (cast 64 (msb (var r2)) (var r2)) (cast 64 (msb (var r3)) (var r3))) (append (var r1) (var r0)))) (set zf (is_zero (var res))) (set nf (msb (var res))) (set r0 (cast 32 false (var res))) (set r1 (cast 32 false (>> (var res) (bv 6 0x20) false))))
d "smlalbb r0, r1, r2, r3" 820341e1 0x0 (seq (set res (+ (* (cast 64 (msb (cast 16 false (var r2))) (cast 16 false (var r2))) (cast 64 (msb (cast 16 false (var r3))) (cast 16 false (var r3)))) (append (var r1) (var r0)))) (set r0 (cast 32 false (var res))) (set r1 (cast 32 false (>> (var res) (bv 6 0x20) false))))
d "smlalbt r0, r1, r2, r3" c20341e1 0x0 (seq (set res (+ (* (cast 64 (msb (cast 16 false (var r2))) (cast 16 false (var r2))) (cast 64 (msb (cast 16 false (>> (var r3) (bv 5 0x10) false))) (cast 16 false (>> (var r3) (bv 5 0x10) false)))) (append (var r1) (var r0)))) (set r0 (cast 32 false (var res))) (set r1 (cast 32 false (>> (var res) (bv 6 0x20) false))))
d "smlaltb r0, r1, r2, r3" a20341e1 0x0 (seq (set res (+ (* (cast 64 (msb (cast 16 false (>> (var r2) (bv 5 0x10) false))) (cast 16 false (>> (var r2) (bv 5 0x10) false))) (cast 64 (msb (cast 16 false (var r3))) (cast 16 false (var r3)))) (append (var r1) (var r0)))) (set r0 (cast 32 false (var res))) (set r1 (cast 32 false (>> (var res) (bv 6 0x20) false))))
d "smlaltt r0, r1, r2, r3" e20341e1 0x0 (seq (set res (+ (* (cast 64 (msb (cast 16 false (>> (var r2) (bv 5 0x10) false))) (cast 16 false (>> (var r2) (bv 5 0x10) false))) (cast 64 (msb (cast 16 false (>> (var r3) (bv 5 0x10) false))) (cast 16 false (>> (var r3) (bv 5 0x10) false)))) (append (var r1) (var r0)))) (set r0 (cast 32 false (var res))) (set r1 (cast 32 false (>> (var res) (bv 6 0x20) false))))
d "smlald r0, r1, r2, r3" 120341e7 0x0 (seq (set res (+ (+ (* (cast 64 (msb (cast 16 false (var r2))) (cast 16 false (var r2))) (cast 64 (msb (cast 16 false (var r3))) (cast 16 false (var r3)))) (* (cast 64 (msb (cast 16 false (>> (var r2) (bv 5 0x10) false))) (cast 16 false (>> (var r2) (bv 5 0x10) false))) (cast 64 (msb (cast 16 false (>> (var r3) (bv 5 0x10) false))) (cast 16 false (>> (var r3) (bv 5 0x10) false))))) (append (var r1) (var r0)))) (set r0 (cast 32 false (var res))) (set r1 (cast 32 false (>> (var res) (bv 6 0x20) false))))
d "smlaldx r0, r1, r2, r3" 320341e7 0x0 (seq (set res (+ (+ (* (cast 64 (msb (cast 16 false (var r2))) (cast 16 false (var r2))) (cast 64 (msb (cast 16 false (>> (var r3) (bv 5 0x10) false))) (cast 16 false (>> (var r3) (bv 5 0x10) false)))) (* (cast 64 (msb (cast 16 false (>> (var r2) (bv 5 0x10) false))) (cast 16 false (>> (var r2) (bv 5 0x10) false))) (cast 64 (msb (cast 16 false (var r3))) (cast 16 false (var r3))))) (append (var r1) (var r0)))) (set r0 (cast 32 false (var res))) (set r1 (cast 32 false (>> (var res) (bv 6 0x20) false))))
d "smlawb r0, r1, r2, r3" 813220e1 0x0 (seq (set res (+ (>> (* (cast 64 (msb (var r1)) (var r1)) (cast 64 (msb (cast 16 false (var r2))) (cast 16 false (var r2)))) (bv 6 0x10) false) (cast 64 (msb (var r3)) (var r3)))) (set r0 (cast 32 false (var res))) (branch (! (== (cast 48 false (var res)) (cast 48 (msb (var r0)) (var r0)))) (set qf true) nop))
d "smlawt r0, r1, r2, r3" c13220e1 0x0 (seq (set res (+ (>> (* (cast 64 (msb (var r1)) (var r1)) (cast 64 (msb (>> (var r2) (bv 5 0x10) (msb (var r2)))) (>> (var r2) (bv 5 0x10) (msb (var r2))))) (bv 6 0x10) false) (cast 64 (msb (var r3)) (var r3)))) (set r0 (cast 32 false (var res))) (branch (! (== (cast 48 false (var res)) (cast 48 (msb (var r0)) (var r0)))) (set qf true) nop))
d "smlsd r0, r1, r2, r3" 513200e7 0x0 (seq (set res (+ (- (* (cast 34 (msb (cast 16 false (var r1))) (cast 16 false (var r1))) (cast 34 (msb (cast 16 false (var r2))) (cast 16 false (var r2)))) (* (cast 34 (msb (cast 16 false (>> (var r1) (bv 5 0x10) false))) (cast 16 false (>> (var r1) (bv 5 0x10) false))) (cast 34 (msb (cast 16 false (>> (var r2) (bv 5 0x10) false))) (cast 16 false (>> (var r2) (bv 5 0x10) false))))) (cast 34 (msb (var r3)) (var r3)))) (set r0 (cast 32 false (var res))) (branch (! (== (var res) (cast 34 (msb (var r0)) (var r0)))) (set qf true) nop))
d "smlsdx r0, r1, r2, r3" 713200e7 0x0 (seq (set res (+ (- (* (cast 34 (msb (cast 16 false (var r1))) (cast 16 false (var r1))) (cast 34 (msb (cast 16 false (>> (var r2) (bv 5 0x10) false))) (cast 16 false (>> (var r2) (bv 5 0x10) false)))) (* (cast 34 (msb (cast 16 false (>> (var r1) (bv 5 0x10) false))) (cast 16 false (>> (var r1) (bv 5 0x10) false))) (cast 34 (msb (cast 16 false (var r2))) (cast 16 false (var r2))))) (cast 34 (msb (var r3)) (var r3)))) (set r0 (cast 32 false (var res))) (branch (! (== (var res) (cast 34 (msb (var r0)) (var r0)))) (set qf true) nop))
d "smlsld r0, r1, r2, r3" 520341e7 0x0 (seq (set res (+ (- (* (cast 64 (msb (cast 16 false (var r2))) (cast 16 false (var r2))) (cast 64 (msb (cast 16 false (var r3))) (cast 16 false (var r3)))) (* (cast 64 (msb (cast 16 false (>> (var r2) (bv 5 0x10) false))) (cast 16 false (>> (var r2) (bv 5 0x10) false))) (cast 64 (msb (cast 16 false (>> (var r3) (bv 5 0x10) false))) (cast 16 false (>> (var r3) (bv 5 0x10) false))))) (append (var r1) (var r0)))) (set r0 (cast 32 false (var res))) (set r1 (cast 32 false (>> (var res) (bv 6 0x20) false))))
d "smlsldx r0, r1, r2, r3" 720341e7 0x0 (seq (set res (+ (- (* (cast 64 (msb (cast 16 false (var r2))) (cast 16 false (var r2))) (cast 64 (msb (cast 16 false (>> (var r3) (bv 5 0x10) false))) (cast 16 false (>> (var r3) (bv 5 0x10) false)))) (* (cast 64 (msb (cast 16 false (>> (var r2) (bv 5 0x10) false))) (cast 16 false (>> (var r2) (bv 5 0x10) false))) (cast 64 (msb (cast 16 false (var r3))) (cast 16 false (var r3))))) (append (var r1) (var r0)))) (set r0 (cast 32 false (var res))) (set r1 (cast 32 false (>> (var res) (bv 6 0x20) false))))
d "smmla r0, r1, r2, r3" 113250e7 0x0 (set r0 (cast 32 false (>> (+ (* (cast 64 (msb (var r1)) (var r1)) (cast 64 (msb (var r2)) (var r2))) (append (var r3) (bv 32 0x0))) (bv 6 0x20) false)))
d "smmlar r0, r1, r2, r3" 313250e7 0x0 (set r0 (cast 32 false (>> (+ (+ (* (cast 64 (msb (var r1)) (var r1)) (cast 64 (msb (var r2)) (var r2))) (append (var r3) (bv 32 0x0))) (bv 64 0x80000000)) (bv 6 0x20) false)))
d "smmls r0, r1, r2, r3" d13250e7 0x0 (set r0 (cast 32 false (>> (- (append (var r3) (bv 32 0x0)) (* (cast 64 (msb (var r1)) (var r1)) (cast 64 (msb (var r2)) (var r2)))) (bv 6 0x20) false)))
d "smmlsr r0, r1, r2, r3" f13250e7 0x0 (set r0 (cast 32 false (>> (+ (- (append (var r3) (bv 32 0x0)) (* (cast 64 (msb (var r1)) (var r1)) (cast 64 (msb (var r2)) (var r2)))) (bv 64 0x80000000)) (bv 6 0x20) false)))
d "smmul r0, r1, r2" 11f250e7 0x0 (set r0 (cast 32 false (>> (* (cast 64 (msb (var r1)) (var r1)) (cast 64 (msb (var r2)) (var r2))) (bv 6 0x20) false)))
d "smmulr r0, r1, r2" 31f250e7 0x0 (set r0 (cast 32 false (>> (+ (* (cast 64 (msb (var r1)) (var r1)) (cast 64 (msb (var r2)) (var r2))) (bv 64 0x80000000)) (bv 6 0x20) false)))
d "smuad r0, r1, r2" 11f200e7 0x0 (seq (set res (+ (* (cast 33 (msb (cast 16 false (var r1))) (cast 16 false (var r1))) (cast 33 (msb (cast 16 false (var r2))) (cast 16 false (var r2)))) (* (cast 33 (msb (cast 16 false (>> (var r1) (bv 5 0x10) false))) (cast 16 false (>> (var r1) (bv 5 0x10) false))) (cast 33 (msb (cast 16 false (>> (var r2) (bv 5 0x10) false))) (cast 16 false (>> (var r2) (bv 5 0x10) false)))))) (set r0 (cast 32 false (var res))) (branch (^^ (msb (var res)) (msb (var r0))) (set qf true) nop))
d "smuadx r0, r1, r2" 31f200e7 0x0 (seq (set res (+ (* (cast 33 (msb (cast 16 false (var r1))) (cast 16 false (var r1))) (cast 33 (msb (cast 16 false (>> (var r2) (bv 5 0x10) false))) (cast 16 false (>> (var r2) (bv 5 0x10) false)))) (* (cast 33 (msb (cast 16 false (>> (var r1) (bv 5 0x10) false))) (cast 16 false (>> (var r1) (bv 5 0x10) false))) (cast 33 (msb (cast 16 false (var r2))) (cast 16 false (var r2)))))) (set r0 (cast 32 false (var res))) (branch (^^ (msb (var res)) (msb (var r0))) (set qf true) nop))
d "smulbb r0, r1, r2" 810260e1 0x0 (set r0 (* (cast 32 (msb (cast 16 false (var r1))) (cast 16 false (var r1))) (cast 32 (msb (cast 16 false (var r2))) (cast 16 false (var r2)))))
d "smulbt r0, r1, r2" c10260e1 0x0 (set r0 (* (cast 32 (msb (cast 16 false (var r1))) (cast 16 false (var r1))) (cast 32 (msb (cast 16 false (>> (var r2) (bv 5 0x10) false))) (cast 16 false (>> (var r2) (bv 5 0x10) false)))))
d "smultb r0, r1, r2" a10260e1 0x0 (set r0 (* (cast 32 (msb (cast 16 false (>> (var r1) (bv 5 0x10) false))) (cast 16 false (>> (var r1) (bv 5 0x10) false))) (cast 32 (msb (cast 16 false (var r2))) (cast 16 false (var r2)))))
d "smultt r0, r1, r2" e10260e1 0x0 (set r0 (* (cast 32 (msb (cast 16 false (>> (var r1) (bv 5 0x10) false))) (cast 16 false (>> (var r1) (bv 5 0x10) false))) (cast 32 (msb (cast 16 false (>> (var r2) (bv 5 0x10) false))) (cast 16 false (>> (var r2) (bv 5 0x10) false)))))
d "smusd r0, r1, r2" 51f200e7 0x0 (set r0 (- (* (cast 32 (msb (cast 16 false (var r1))) (cast 16 false (var r1))) (cast 32 (msb (cast 16 false (var r2))) (cast 16 false (var r2)))) (* (cast 32 (msb (cast 16 false (>> (var r1) (bv 5 0x10) false))) (cast 16 false (>> (var r1) (bv 5 0x10) false))) (cast 32 (msb (cast 16 false (>> (var r2) (bv 5 0x10) false))) (cast 16 false (>> (var r2) (bv 5 0x10) false))))))
d "smusdx r0, r1, r2" 71f200e7 0x0 (set r0 (- (* (cast 32 (msb (cast 16 false (var r1))) (cast 16 false (var r1))) (cast 32 (msb (cast 16 false (>> (var r2) (bv 5 0x10) false))) (cast 16 false (>> (var r2) (bv 5 0x10) false)))) (* (cast 32 (msb (cast 16 false (>> (var r1) (bv 5 0x10) false))) (cast 16 false (>> (var r1) (bv 5 0x10) false))) (cast 32 (msb (cast 16 false (var r2))) (cast 16 false (var r2))))))
d "ssat r2, 0xd, r5" 1520ace6 0x0 (seq (set er (var r5)) (branch (! (sle (var er) (bv 32 0xfff))) (seq (set r (bv 13 0xfff)) (set qf true)) (branch (&& (sle (var er) (bv 32 0xfffff000)) (! (== (var er) (bv 32 0xfffff000)))) (seq (set r (bv 13 0x1000)) (set qf true)) (set r (cast 13 false (var er))))) (set r2 (cast 32 (msb (var r)) (var r))))
d "ssat r2, 0x20, r5, asr 3" d521bfe6 0x0 (seq (set er (>> (var r5) (bv 5 0x3) (msb (var r5)))) (branch (! (sle (var er) (bv 32 0x7fffffff))) (seq (set r (bv 32 0x7fffffff)) (set qf true)) (branch (&& (sle (var er) (bv 32 0x80000000)) (! (== (var er) (bv 32 0x80000000)))) (seq (set r (bv 32 0x80000000)) (set qf true)) (set r (cast 32 false (var er))))) (set r2 (cast 32 (msb (var r)) (var r))))
d "ssat16 r2, 0xc, r5" 352fabe6 0x0 (seq (set er (cast 16 false (var r5))) (branch (! (sle (var er) (bv 16 0x7ff))) (seq (set rl (bv 12 0x7ff)) (set qf true)) (branch (&& (sle (var er) (bv 16 0xf800)) (! (== (var er) (bv 16 0xf800)))) (seq (set rl (bv 12 0x800)) (set qf true)) (set rl (cast 12 false (var er))))) (set er (cast 16 false (>> (var r5) (bv 5 0x10) false))) (branch (! (sle (var er) (bv 16 0x7ff))) (seq (set rh (bv 12 0x7ff)) (set qf true)) (branch (&& (sle (var er) (bv 16 0xf800)) (! (== (var er) (bv 16 0xf800)))) (seq (set rh (bv 12 0x800)) (set qf true)) (set rh (cast 12 false (var er))))) (set r2 (append (cast 16 (msb (var rh)) (var rh)) (cast 16 (msb (var rl)) (var rl)))))
d "usat r2, 0xd, r5" 1520ede6 0x0 (seq (set er (var r5)) (branch (! (sle (var er) (bv 32 0x1fff))) (seq (set r (bv 13 0x1fff)) (set qf true)) (branch (&& (sle (var er) (bv 32 0x0)) (! (== (var er) (bv 32 0x0)))) (seq (set r (bv 13 0x0)) (set qf true)) (set r (cast 13 false (var er))))) (set r2 (cast 32 false (var r))))
d "usat r2, 0x1f, r5, asr 3" d521ffe6 0x0 (seq (set er (>> (var r5) (bv 5 0x3) (msb (var r5)))) (branch (! (sle (var er) (bv 32 0x7fffffff))) (seq (set r (bv 31 0x7fffffff)) (set qf true)) (branch (&& (sle (var er) (bv 32 0x0)) (! (== (var er) (bv 32 0x0)))) (seq (set r (bv 31 0x0)) (set qf true)) (set r (cast 31 false (var er))))) (set r2 (cast 32 false (var r))))
d "usat16 r2, 0xc, r5" 352fece6 0x0 (seq (set er (cast 16 false (var r5))) (branch (! (sle (var er) (bv 16 0xfff))) (seq (set rl (bv 12 0xfff)) (set qf true)) (branch (&& (sle (var er) (bv 16 0x0)) (! (== (var er) (bv 16 0x0)))) (seq (set rl (bv 12 0x0)) (set qf true)) (set rl (cast 12 false (var er))))) (set er (cast 16 false (>> (var r5) (bv 5 0x10) false))) (branch (! (sle (var er) (bv 16 0xfff))) (seq (set rh (bv 12 0xfff)) (set qf true)) (branch (&& (sle (var er) (bv 16 0x0)) (! (== (var er) (bv 16 0x0)))) (seq (set rh (bv 12 0x0)) (set qf true)) (set rh (cast 12 false (var er))))) (set r2 (append (cast 16 false (var rh)) (cast 16 false (var rl)))))
d "umaal r1, r2, r3, r4" 931442e0 0x0 (seq (set res (+ (+ (* (cast 64 false (var r3)) (cast 64 false (var r4))) (cast 64 false (var r1))) (cast 64 false (var r2)))) (set r1 (cast 32 false (var res))) (set r2 (cast 32 false (>> (var res) (bv 6 0x20) false))))
d "umlal r1, r2, r3, r4" 9314a2e0 0x0 (seq (set res (+ (* (cast 64 false (var r3)) (cast 64 false (var r4))) (append (var r2) (var r1)))) (set r1 (cast 32 false (var res))) (set r2 (cast 32 false (>> (var res) (bv 6 0x20) false))))
d "umlals r1, r2, r3, r4" 9314b2e0 0x0 (seq (set res (+ (* (cast 64 false (var r3)) (cast 64 false (var r4))) (append (var r2) (var r1)))) (set zf (is_zero (var res))) (set nf (msb (var res))) (set r1 (cast 32 false (var res))) (set r2 (cast 32 false (>> (var res) (bv 6 0x20) false))))
d "umull r1, r2, r3, r4" 931482e0 0x0 (seq (set res (* (cast 64 false (var r3)) (cast 64 false (var r4)))) (set r1 (cast 32 false (var res))) (set r2 (cast 32 false (>> (var res) (bv 6 0x20) false))))
d "umulls r1, r2, r3, r4" 931492e0 0x0 (seq (set res (* (cast 64 false (var r3)) (cast 64 false (var r4)))) (set r1 (cast 32 false (var res))) (set r2 (cast 32 false (>> (var res) (bv 6 0x20) false))) (set zf (is_zero (var res))) (set nf (msb (var res))))
d "usad8 r1, r2, r3" 12f381e7 0x0 (set r1 (+ (let a (cast 32 false (cast 8 false (var r2))) (let b (cast 32 false (cast 8 false (var r3))) (ite (ule (var a) (var b)) (- (var b) (var a)) (- (var a) (var b))))) (+ (let a (cast 32 false (cast 8 false (>> (var r2) (bv 5 0x8) false))) (let b (cast 32 false (cast 8 false (>> (var r3) (bv 5 0x8) false))) (ite (ule (var a) (var b)) (- (var b) (var a)) (- (var a) (var b))))) (+ (let a (cast 32 false (cast 8 false (>> (var r2) (bv 5 0x10) false))) (let b (cast 32 false (cast 8 false (>> (var r3) (bv 5 0x10) false))) (ite (ule (var a) (var b)) (- (var b) (var a)) (- (var a) (var b))))) (let a (cast 32 false (cast 8 false (>> (var r2) (bv 5 0x18) false))) (let b (cast 32 false (cast 8 false (>> (var r3) (bv 5 0x18) false))) (ite (ule (var a) (var b)) (- (var b) (var a)) (- (var a) (var b)))))))))
d "usad8 r1, r1, r3" 11f381e7 0x0 (set r1 (+ (let a (cast 32 false (cast 8 false (var r1))) (let b (cast 32 false (cast 8 false (var r3))) (ite (ule (var a) (var b)) (- (var b) (var a)) (- (var a) (var b))))) (+ (let a (cast 32 false (cast 8 false (>> (var r1) (bv 5 0x8) false))) (let b (cast 32 false (cast 8 false (>> (var r3) (bv 5 0x8) false))) (ite (ule (var a) (var b)) (- (var b) (var a)) (- (var a) (var b))))) (+ (let a (cast 32 false (cast 8 false (>> (var r1) (bv 5 0x10) false))) (let b (cast 32 false (cast 8 false (>> (var r3) (bv 5 0x10) false))) (ite (ule (var a) (var b)) (- (var b) (var a)) (- (var a) (var b))))) (let a (cast 32 false (cast 8 false (>> (var r1) (bv 5 0x18) false))) (let b (cast 32 false (cast 8 false (>> (var r3) (bv 5 0x18) false))) (ite (ule (var a) (var b)) (- (var b) (var a)) (- (var a) (var b)))))))))
d "usada8 r1, r2, r3, r4" 124381e7 0x0 (set r1 (+ (var r4) (+ (let a (cast 32 false (cast 8 false (var r2))) (let b (cast 32 false (cast 8 false (var r3))) (ite (ule (var a) (var b)) (- (var b) (var a)) (- (var a) (var b))))) (+ (let a (cast 32 false (cast 8 false (>> (var r2) (bv 5 0x8) false))) (let b (cast 32 false (cast 8 false (>> (var r3) (bv 5 0x8) false))) (ite (ule (var a) (var b)) (- (var b) (var a)) (- (var a) (var b))))) (+ (let a (cast 32 false (cast 8 false (>> (var r2) (bv 5 0x10) false))) (let b (cast 32 false (cast 8 false (>> (var r3) (bv 5 0x10) false))) (ite (ule (var a) (var b)) (- (var b) (var a)) (- (var a) (var b))))) (let a (cast 32 false (cast 8 false (>> (var r2) (bv 5 0x18) false))) (let b (cast 32 false (cast 8 false (>> (var r3) (bv 5 0x18) false))) (ite (ule (var a) (var b)) (- (var b) (var a)) (- (var a) (var b))))))))))
d "and r1, r1, r2, asr 3" c21101e0 0x0 (set r1 (& (var r1) (>> (var r2) (bv 5 0x3) (msb (var r2)))))
d "and r1, r1, r2, lsl 3" 821101e0 0x0 (set r1 (& (var r1) (<< (var r2) (bv 5 0x3) false)))
d "and r1, r1, r2, lsr 3" a21101e0 0x0 (set r1 (& (var r1) (>> (var r2) (bv 5 0x3) false)))
d "and r1, r1, r2, ror 3" e21101e0 0x0 (set r1 (& (var r1) (| (>> (var r2) (bv 5 0x3) false) (<< (var r2) (~- (bv 5 0x3)) false))))
d "and r1, r1, r2, rrx" 621001e0 0x0 (set r1 (& (var r1) (>> (var r2) (bv 5 0x1) (var cf))))
d "and r1, r1, r2, asr r3" 521301e0 0x0 (set r1 (& (var r1) (>> (var r2) (cast 8 false (var r3)) (msb (var r2)))))
d "and r1, r1, r2, lsl r3" 121301e0 0x0 (set r1 (& (var r1) (<< (var r2) (cast 8 false (var r3)) false)))
d "and r1, r1, r2, lsr r3" 321301e0 0x0 (set r1 (& (var r1) (>> (var r2) (cast 8 false (var r3)) false)))
d "and r1, r1, r2, ror r3" 721301e0 0x0 (set r1 (& (var r1) (| (>> (var r2) (cast 5 false (var r3)) false) (<< (var r2) (~- (cast 5 false (var r3))) false))))

d "vstmia r2, {s4, s5}" 022a82ec 0x0 (seq (storew 0 (+ (var r2) (bv 32 0x0)) (cast 32 false (var d2))) (storew 0 (+ (var r2) (bv 32 0x4)) (cast 32 false (>> (var d2) (bv 7 0x20) false))))
d "vstmia r2!, {s4, s5}" 022aa2ec 0x0 (seq (storew 0 (+ (var r2) (bv 32 0x0)) (cast 32 false (var d2))) (storew 0 (+ (var r2) (bv 32 0x4)) (cast 32 false (>> (var d2) (bv 7 0x20) false))) (set r2 (+ (var r2) (bv 32 0x8))))
d "vstmia sp, {s4, s5}" 022a8dec 0x0 (seq (storew 0 (+ (var sp) (bv 32 0x0)) (cast 32 false (var d2))) (storew 0 (+ (var sp) (bv 32 0x4)) (cast 32 false (>> (var d2) (bv 7 0x20) false))))
d "vstmia sp!, {s4, s5}" 022aadec 0x0 (seq (storew 0 (+ (var sp) (bv 32 0x0)) (cast 32 false (var d2))) (storew 0 (+ (var sp) (bv 32 0x4)) (cast 32 false (>> (var d2) (bv 7 0x20) false))) (set sp (+ (var sp) (bv 32 0x8))))
d "vstmia ip, {s0, s1, s2, s3}" 040a8cec 0x0 (seq (storew 0 (+ (var r12) (bv 32 0x0)) (cast 32 false (var d0))) (storew 0 (+ (var r12) (bv 32 0x4)) (cast 32 false (>> (var d0) (bv 7 0x20) false))) (storew 0 (+ (var r12) (bv 32 0x8)) (cast 32 false (var d1))) (storew 0 (+ (var r12) (bv 32 0xc)) (cast 32 false (>> (var d1) (bv 7 0x20) false))))
d "vstmia ip, {d2, d3}" 042b8cec 0x0 (seq (storew 0 (+ (var r12) (bv 32 0x0)) (var d2)) (storew 0 (+ (var r12) (bv 32 0x8)) (var d3)))
d "vstmdb ip!, {s0, s1}" 020a2ced 0x0 (seq (storew 0 (- (var r12) (bv 32 0x8)) (cast 32 false (var d0))) (storew 0 (- (var r12) (bv 32 0x4)) (cast 32 false (>> (var d0) (bv 7 0x20) false))) (set r12 (- (var r12) (bv 32 0x8))))
d "vpush {s0, s1}" 020a2ded 0x0 (seq (storew 0 (- (var sp) (bv 32 0x8)) (cast 32 false (var d0))) (storew 0 (- (var sp) (bv 32 0x4)) (cast 32 false (>> (var d0) (bv 7 0x20) false))) (set sp (- (var sp) (bv 32 0x8))))
d "vldmia r2, {s0, s1}" 020a92ec 0x0 (seq (set base (var r2)) (set d0 (| (& (var d0) (bv 64 0xffffffff00000000)) (cast 64 false (loadw 0 32 (+ (var base) (bv 32 0x4)))))) (set d0 (| (& (var d0) (bv 64 0xffffffff)) (<< (cast 64 false (loadw 0 32 (+ (var base) (bv 32 0x8)))) (bv 6 0x20) false))))
d "vldmia r2!, {s0, s1}" 020ab2ec 0x0 (seq (set base (var r2)) (set d0 (| (& (var d0) (bv 64 0xffffffff00000000)) (cast 64 false (loadw 0 32 (+ (var base) (bv 32 0x4)))))) (set d0 (| (& (var d0) (bv 64 0xffffffff)) (<< (cast 64 false (loadw 0 32 (+ (var base) (bv 32 0x8)))) (bv 6 0x20) false))) (set r2 (+ (var base) (bv 32 0x8))))
d "vldmdb r2!, {s0, s1}" 020a32ed 0x0 (seq (set base (var r2)) (set d0 (| (& (var d0) (bv 64 0xffffffff00000000)) (cast 64 false (loadw 0 32 (- (var base) (bv 32 0x4)))))) (set d0 (| (& (var d0) (bv 64 0xffffffff)) (<< (cast 64 false (loadw 0 32 (- (var base) (bv 32 0x0)))) (bv 6 0x20) false))) (set r2 (- (var base) (bv 32 0x8))))
d "vpop {s0, s1}" 020abdec 0x0 (seq (set base (var sp)) (set d0 (| (& (var d0) (bv 64 0xffffffff00000000)) (cast 64 false (loadw 0 32 (+ (var base) (bv 32 0x0)))))) (set d0 (| (& (var d0) (bv 64 0xffffffff)) (<< (cast 64 false (loadw 0 32 (+ (var base) (bv 32 0x4)))) (bv 6 0x20) false))) (set sp (+ (var base) (bv 32 0x8))))
d "vpop {d2, d3}" 042bbdec 0x0 (seq (set base (var sp)) (set d2 (loadw 0 64 (+ (var base) (bv 32 0x0)))) (set d3 (loadw 0 64 (+ (var base) (bv 32 0x8)))) (set sp (+ (var base) (bv 32 0x10))))
d "vmov r2, s4" 102a12ee 0x0 (set r2 (cast 32 false (var d2)))
d "vmov s2, r4" 104a01ee 0x0 (set d1 (| (& (var d1) (bv 64 0xffffffff00000000)) (cast 64 false (var r4))))
d "vmov.f32 s3, s5" 621af0ee 0x0 (set d1 (| (& (var d1) (bv 64 0xffffffff)) (<< (cast 64 false (cast 32 false (>> (var d2) (bv 7 0x20) false))) (bv 6 0x20) false)))

d "vmov r0, s1" 900a10ee 0x0 (set r0 (cast 32 false (>> (var d0) (bv 7 0x20) false)))
d "vmov s0, r1" 101a00ee 0x0 (set d0 (| (& (var d0) (bv 64 0xffffffff00000000)) (cast 64 false (var r1))))
d "vmov r0, r1, d1" 110b51ec 0x0 (seq (set r0 (cast 32 false (var d1))) (set r1 (cast 32 false (>> (var d1) (bv 8 0x20) false))))
d "vmov d0, r1, r2" 101b42ec 0x0 (set d0 (append (var r2) (var r1)))
d "vmov s0, s1, r0, r1" 100a41ec 0x0 (seq (set d0 (| (& (var d0) (bv 64 0xffffffff00000000)) (cast 64 false (var r0)))) (set d0 (| (& (var d0) (bv 64 0xffffffff)) (<< (cast 64 false (var r1)) (bv 6 0x20) false))))
d "vmov r0, r1, s0, s1" 100a51ec 0x0 (seq (set r0 (cast 32 false (var d0))) (set r1 (cast 32 false (>> (var d0) (bv 7 0x20) false))))
d "vmov.f32 s0, 5.000000e-01" 000ab6ee 0x0 (set d0 (| (& (var d0) (bv 64 0xffffffff00000000)) (cast 64 false (bv 32 0x3f000000))))
d "vmov.f64 d0, 1.250000e+00" 040bb7ee 0x0 (set d0 (bv 64 0x3fa00000))
d "vmov.f32 s0, s1" 600ab0ee 0x0 (set d0 (| (& (var d0) (bv 64 0xffffffff00000000)) (cast 64 false (cast 32 false (>> (var d0) (bv 7 0x20) false)))))
d "vorr d0, d1, d1" 110121f2 0x0 (set d0 (| (var d1) (var d1)))
d "vmrs r0, fpscr" 100af1ee 0x0 (set r0 (var fpscr))
d "vmsr fpscr, r0" 100ae1ee 0x0 (set fpscr (var r0))
dB "vmrs apsr_nzcv, fpscr" 10faf1ee 0x0 (seq (set nf (! (is_zero (& (var fpscr) (bv 32 0x80000000))))) (set zf (! (is_zero (& (var fpscr) (bv 32 0x40000000))))) (set cf (! (is_zero (& (var fpscr) (bv 32 0x20000000))))) (set vf (! (is_zero (& (var fpscr) (bv 32 0x10000000))))))
d "vand q0, q1, q2" 540102f2 0x0 (seq (set d0 (cast 64 false (& (append (var d3) (var d2)) (append (var d5) (var d4))))) (set d1 (cast 64 false (>> (& (append (var d3) (var d2)) (append (var d5) (var d4))) (bv 8 0x40) false))))
d "vand d0, d1, d2" 120101f2 0x0 (set d0 (& (var d1) (var d2)))
d "vand d0, d0, d1" 110100f2 0x0 (set d0 (& (var d0) (var d1)))
d "veor q0, q1, q2" 540102f3 0x0 (seq (set d0 (cast 64 false (^ (append (var d3) (var d2)) (append (var d5) (var d4))))) (set d1 (cast 64 false (>> (^ (append (var d3) (var d2)) (append (var d5) (var d4))) (bv 8 0x40) false))))
d "veor d0, d1, d2" 120101f3 0x0 (set d0 (^ (var d1) (var d2)))
d "veor d0, d0, d1" 110100f3 0x0 (set d0 (^ (var d0) (var d1)))
d "vorn q0, q1, q2" 540132f2 0x0 (seq (set d0 (cast 64 false (| (append (var d3) (var d2)) (~ (append (var d5) (var d4)))))) (set d1 (cast 64 false (>> (| (append (var d3) (var d2)) (~ (append (var d5) (var d4)))) (bv 8 0x40) false))))
d "vorn d0, d1, d2" 120131f2 0x0 (set d0 (| (var d1) (~ (var d2))))
d "vorn d0, d0, d1" 110130f2 0x0 (set d0 (| (var d0) (~ (var d1))))
d "vbic q0, q1, q2" 540112f2 0x0 (seq (set d0 (cast 64 false (& (append (var d3) (var d2)) (~ (append (var d5) (var d4)))))) (set d1 (cast 64 false (>> (& (append (var d3) (var d2)) (~ (append (var d5) (var d4)))) (bv 8 0x40) false))))
d "vbic d0, d1, d2" 120111f2 0x0 (set d0 (& (var d1) (~ (var d2))))
d "vbic d0, d0, d1" 110110f2 0x0 (set d0 (& (var d0) (~ (var d1))))
d "vbic.i16 d0, 0x12" 320981f2 0x0 (set d0 (& (var d0) (~ (bv 64 0x1200120024))))
d "vbic.i32 d0, 0x4200" 320384f2 0x0 (set d0 (& (var d0) (~ (bv 64 0x8400))))
d "vorr q0, q1, q2" 540122f2 0x0 (seq (set d0 (cast 64 false (| (append (var d3) (var d2)) (append (var d5) (var d4))))) (set d1 (cast 64 false (>> (| (append (var d3) (var d2)) (append (var d5) (var d4))) (bv 8 0x40) false))))
d "vorr d0, d1, d2" 120121f2 0x0 (set d0 (| (var d1) (var d2)))
d "vorr d0, d0, d1" 110120f2 0x0 (set d0 (| (var d0) (var d1)))
d "vorr.i16 d0, 0x1200" 120b81f2 0x0 (set d0 (| (var d0) (bv 64 0x120012002400)))
d "vorr.i32 d0, 0x42" 120184f2 0x0 (set d0 (| (var d0) (bv 64 0x84)))
d "vbit d0, d1, d2" 120121f3 0x0 (set d0 (| (& (var d1) (var d2)) (& (var d0) (~ (var d2)))))
d "vbit q0, q1, q2" 540122f3 0x0 (seq (set d0 (cast 64 false (| (& (append (var d3) (var d2)) (append (var d5) (var d4))) (& (append (var d1) (var d0)) (~ (append (var d5) (var d4))))))) (set d1 (cast 64 false (>> (| (& (append (var d3) (var d2)) (append (var d5) (var d4))) (& (append (var d1) (var d0)) (~ (append (var d5) (var d4))))) (bv 8 0x40) false))))
d "vbit d0, d0, d2" 120120f3 0x0 (set d0 (| (& (var d0) (var d2)) (& (var d0) (~ (var d2)))))
d "vbif d0, d1, d2" 120131f3 0x0 (set d0 (| (& (var d0) (var d2)) (& (var d1) (~ (var d2)))))
d "vbif q0, q1, q2" 540132f3 0x0 (seq (set d0 (cast 64 false (| (& (append (var d1) (var d0)) (append (var d5) (var d4))) (& (append (var d3) (var d2)) (~ (append (var d5) (var d4))))))) (set d1 (cast 64 false (>> (| (& (append (var d1) (var d0)) (append (var d5) (var d4))) (& (append (var d3) (var d2)) (~ (append (var d5) (var d4))))) (bv 8 0x40) false))))
d "vbsl d0, d1, d2" 120111f3 0x0 (set d0 (| (& (var d1) (var d0)) (& (var d2) (~ (var d0)))))
d "vbsl q0, q1, q2" 540112f3 0x0 (seq (set d0 (cast 64 false (| (& (append (var d3) (var d2)) (append (var d1) (var d0))) (& (append (var d5) (var d4)) (~ (append (var d1) (var d0))))))) (set d1 (cast 64 false (>> (| (& (append (var d3) (var d2)) (append (var d1) (var d0))) (& (append (var d5) (var d4)) (~ (append (var d1) (var d0))))) (bv 8 0x40) false))))
d "vmvn d0, d1" 8105b0f3 0x0 (set d0 (~ (var d1)))
d "vmvn q0, q1" c205b0f3 0x0 (seq (set d0 (cast 64 false (~ (append (var d3) (var d2))))) (set d1 (cast 64 false (>> (~ (append (var d3) (var d2))) (bv 8 0x40) false))))
d "vacge.f32 d0, d1, d2" 120e01f3 0x0 (seq empty (set d0 (<< (cast 64 false (ite (! (<. (fpos (float 0 (cast 32 false (>> (var d1) (bv 8 0x0) false)) )) (fpos (float 0 (cast 32 false (>> (var d2) (bv 8 0x0) false)) )))) (~ (bv 32 0x0)) (bv 32 0x0))) (bv 8 0x0) false)) (set d0 (<< (cast 64 false (ite (! (<. (fpos (float 0 (cast 32 false (>> (var d1) (bv 8 0x20) false)) )) (fpos (float 0 (cast 32 false (>> (var d2) (bv 8 0x20) false)) )))) (~ (bv 32 0x0)) (bv 32 0x0))) (bv 8 0x20) false)))
d "vacge.f32 d0, d0, d1" 110e00f3 0x0 (seq empty (set d0 (<< (cast 64 false (ite (! (<. (fpos (float 0 (cast 32 false (>> (var d0) (bv 8 0x0) false)) )) (fpos (float 0 (cast 32 false (>> (var d1) (bv 8 0x0) false)) )))) (~ (bv 32 0x0)) (bv 32 0x0))) (bv 8 0x0) false)) (set d0 (<< (cast 64 false (ite (! (<. (fpos (float 0 (cast 32 false (>> (var d0) (bv 8 0x20) false)) )) (fpos (float 0 (cast 32 false (>> (var d1) (bv 8 0x20) false)) )))) (~ (bv 32 0x0)) (bv 32 0x0))) (bv 8 0x20) false)))
d "vacge.f32 q0, q1, q2" 540e02f3 0x0 (seq empty (set d0 (cast 64 false (<< (cast 128 false (ite (! (<. (fpos (float 0 (cast 32 false (>> (append (var d3) (var d2)) (bv 8 0x0) false)) )) (fpos (float 0 (cast 32 false (>> (append (var d5) (var d4)) (bv 8 0x0) false)) )))) (~ (bv 32 0x0)) (bv 32 0x0))) (bv 8 0x0) false))) (set d1 (cast 64 false (>> (<< (cast 128 false (ite (! (<. (fpos (float 0 (cast 32 false (>> (append (var d3) (var d2)) (bv 8 0x0) false)) )) (fpos (float 0 (cast 32 false (>> (append (var d5) (var d4)) (bv 8 0x0) false)) )))) (~ (bv 32 0x0)) (bv 32 0x0))) (bv 8 0x0) false) (bv 8 0x40) false))) (set d0 (cast 64 false (<< (cast 128 false (ite (! (<. (fpos (float 0 (cast 32 false (>> (append (var d3) (var d2)) (bv 8 0x20) false)) )) (fpos (float 0 (cast 32 false (>> (append (var d5) (var d4)) (bv 8 0x20) false)) )))) (~ (bv 32 0x0)) (bv 32 0x0))) (bv 8 0x20) false))) (set d1 (cast 64 false (>> (<< (cast 128 false (ite (! (<. (fpos (float 0 (cast 32 false (>> (append (var d3) (var d2)) (bv 8 0x20) false)) )) (fpos (float 0 (cast 32 false (>> (append (var d5) (var d4)) (bv 8 0x20) false)) )))) (~ (bv 32 0x0)) (bv 32 0x0))) (bv 8 0x20) false) (bv 8 0x40) false))) (set d0 (cast 64 false (<< (cast 128 false (ite (! (<. (fpos (float 0 (cast 32 false (>> (append (var d3) (var d2)) (bv 8 0x40) false)) )) (fpos (float 0 (cast 32 false (>> (append (var d5) (var d4)) (bv 8 0x40) false)) )))) (~ (bv 32 0x0)) (bv 32 0x0))) (bv 8 0x40) false))) (set d1 (cast 64 false (>> (<< (cast 128 false (ite (! (<. (fpos (float 0 (cast 32 false (>> (append (var d3) (var d2)) (bv 8 0x40) false)) )) (fpos (float 0 (cast 32 false (>> (append (var d5) (var d4)) (bv 8 0x40) false)) )))) (~ (bv 32 0x0)) (bv 32 0x0))) (bv 8 0x40) false) (bv 8 0x40) false))) (set d0 (cast 64 false (<< (cast 128 false (ite (! (<. (fpos (float 0 (cast 32 false (>> (append (var d3) (var d2)) (bv 8 0x60) false)) )) (fpos (float 0 (cast 32 false (>> (append (var d5) (var d4)) (bv 8 0x60) false)) )))) (~ (bv 32 0x0)) (bv 32 0x0))) (bv 8 0x60) false))) (set d1 (cast 64 false (>> (<< (cast 128 false (ite (! (<. (fpos (float 0 (cast 32 false (>> (append (var d3) (var d2)) (bv 8 0x60) false)) )) (fpos (float 0 (cast 32 false (>> (append (var d5) (var d4)) (bv 8 0x60) false)) )))) (~ (bv 32 0x0)) (bv 32 0x0))) (bv 8 0x60) false) (bv 8 0x40) false))))
d "vacgt.f32 d0, d1, d2" 120e21f3 0x0 (seq empty (set d0 (<< (cast 64 false (ite (<. (fpos (float 0 (cast 32 false (>> (var d2) (bv 8 0x0) false)) )) (fpos (float 0 (cast 32 false (>> (var d1) (bv 8 0x0) false)) ))) (~ (bv 32 0x0)) (bv 32 0x0))) (bv 8 0x0) false)) (set d0 (<< (cast 64 false (ite (<. (fpos (float 0 (cast 32 false (>> (var d2) (bv 8 0x20) false)) )) (fpos (float 0 (cast 32 false (>> (var d1) (bv 8 0x20) false)) ))) (~ (bv 32 0x0)) (bv 32 0x0))) (bv 8 0x20) false)))
d "vacgt.f32 q0, q1, q2" 540e22f3 0x0 (seq empty (set d0 (cast 64 false (<< (cast 128 false (ite (<. (fpos (float 0 (cast 32 false (>> (append (var d5) (var d4)) (bv 8 0x0) false)) )) (fpos (float 0 (cast 32 false (>> (append (var d3) (var d2)) (bv 8 0x0) false)) ))) (~ (bv 32 0x0)) (bv 32 0x0))) (bv 8 0x0) false))) (set d1 (cast 64 false (>> (<< (cast 128 false (ite (<. (fpos (float 0 (cast 32 false (>> (append (var d5) (var d4)) (bv 8 0x0) false)) )) (fpos (float 0 (cast 32 false (>> (append (var d3) (var d2)) (bv 8 0x0) false)) ))) (~ (bv 32 0x0)) (bv 32 0x0))) (bv 8 0x0) false) (bv 8 0x40) false))) (set d0 (cast 64 false (<< (cast 128 false (ite (<. (fpos (float 0 (cast 32 false (>> (append (var d5) (var d4)) (bv 8 0x20) false)) )) (fpos (float 0 (cast 32 false (>> (append (var d3) (var d2)) (bv 8 0x20) false)) ))) (~ (bv 32 0x0)) (bv 32 0x0))) (bv 8 0x20) false))) (set d1 (cast 64 false (>> (<< (cast 128 false (ite (<. (fpos (float 0 (cast 32 false (>> (append (var d5) (var d4)) (bv 8 0x20) false)) )) (fpos (float 0 (cast 32 false (>> (append (var d3) (var d2)) (bv 8 0x20) false)) ))) (~ (bv 32 0x0)) (bv 32 0x0))) (bv 8 0x20) false) (bv 8 0x40) false))) (set d0 (cast 64 false (<< (cast 128 false (ite (<. (fpos (float 0 (cast 32 false (>> (append (var d5) (var d4)) (bv 8 0x40) false)) )) (fpos (float 0 (cast 32 false (>> (append (var d3) (var d2)) (bv 8 0x40) false)) ))) (~ (bv 32 0x0)) (bv 32 0x0))) (bv 8 0x40) false))) (set d1 (cast 64 false (>> (<< (cast 128 false (ite (<. (fpos (float 0 (cast 32 false (>> (append (var d5) (var d4)) (bv 8 0x40) false)) )) (fpos (float 0 (cast 32 false (>> (append (var d3) (var d2)) (bv 8 0x40) false)) ))) (~ (bv 32 0x0)) (bv 32 0x0))) (bv 8 0x40) false) (bv 8 0x40) false))) (set d0 (cast 64 false (<< (cast 128 false (ite (<. (fpos (float 0 (cast 32 false (>> (append (var d5) (var d4)) (bv 8 0x60) false)) )) (fpos (float 0 (cast 32 false (>> (append (var d3) (var d2)) (bv 8 0x60) false)) ))) (~ (bv 32 0x0)) (bv 32 0x0))) (bv 8 0x60) false))) (set d1 (cast 64 false (>> (<< (cast 128 false (ite (<. (fpos (float 0 (cast 32 false (>> (append (var d5) (var d4)) (bv 8 0x60) false)) )) (fpos (float 0 (cast 32 false (>> (append (var d3) (var d2)) (bv 8 0x60) false)) ))) (~ (bv 32 0x0)) (bv 32 0x0))) (bv 8 0x60) false) (bv 8 0x40) false))))
d "vceq.i8 d0, d1, d2" 120801f3 0x0 (seq empty (set d0 (<< (cast 64 false (ite (== (cast 8 false (>> (var d1) (bv 8 0x0) false)) (cast 8 false (>> (var d2) (bv 8 0x0) false))) (~ (bv 8 0x0)) (bv 8 0x0))) (bv 8 0x0) false)) (set d0 (<< (cast 64 false (ite (== (cast 8 false (>> (var d1) (bv 8 0x8) false)) (cast 8 false (>> (var d2) (bv 8 0x8) false))) (~ (bv 8 0x0)) (bv 8 0x0))) (bv 8 0x8) false)) (set d0 (<< (cast 64 false (ite (== (cast 8 false (>> (var d1) (bv 8 0x10) false)) (cast 8 false (>> (var d2) (bv 8 0x10) false))) (~ (bv 8 0x0)) (bv 8 0x0))) (bv 8 0x10) false)) (set d0 (<< (cast 64 false (ite (== (cast 8 false (>> (var d1) (bv 8 0x18) false)) (cast 8 false (>> (var d2) (bv 8 0x18) false))) (~ (bv 8 0x0)) (bv 8 0x0))) (bv 8 0x18) false)) (set d0 (<< (cast 64 false (ite (== (cast 8 false (>> (var d1) (bv 8 0x20) false)) (cast 8 false (>> (var d2) (bv 8 0x20) false))) (~ (bv 8 0x0)) (bv 8 0x0))) (bv 8 0x20) false)) (set d0 (<< (cast 64 false (ite (== (cast 8 false (>> (var d1) (bv 8 0x28) false)) (cast 8 false (>> (var d2) (bv 8 0x28) false))) (~ (bv 8 0x0)) (bv 8 0x0))) (bv 8 0x28) false)) (set d0 (<< (cast 64 false (ite (== (cast 8 false (>> (var d1) (bv 8 0x30) false)) (cast 8 false (>> (var d2) (bv 8 0x30) false))) (~ (bv 8 0x0)) (bv 8 0x0))) (bv 8 0x30) false)) (set d0 (<< (cast 64 false (ite (== (cast 8 false (>> (var d1) (bv 8 0x38) false)) (cast 8 false (>> (var d2) (bv 8 0x38) false))) (~ (bv 8 0x0)) (bv 8 0x0))) (bv 8 0x38) false)))
d "vceq.i16 d0, d1, d2" 120811f3 0x0 (seq empty (set d0 (<< (cast 64 false (ite (== (cast 16 false (>> (var d1) (bv 8 0x0) false)) (cast 16 false (>> (var d2) (bv 8 0x0) false))) (~ (bv 16 0x0)) (bv 16 0x0))) (bv 8 0x0) false)) (set d0 (<< (cast 64 false (ite (== (cast 16 false (>> (var d1) (bv 8 0x10) false)) (cast 16 false (>> (var d2) (bv 8 0x10) false))) (~ (bv 16 0x0)) (bv 16 0x0))) (bv 8 0x10) false)) (set d0 (<< (cast 64 false (ite (== (cast 16 false (>> (var d1) (bv 8 0x20) false)) (cast 16 false (>> (var d2) (bv 8 0x20) false))) (~ (bv 16 0x0)) (bv 16 0x0))) (bv 8 0x20) false)) (set d0 (<< (cast 64 false (ite (== (cast 16 false (>> (var d1) (bv 8 0x30) false)) (cast 16 false (>> (var d2) (bv 8 0x30) false))) (~ (bv 16 0x0)) (bv 16 0x0))) (bv 8 0x30) false)))
d "vceq.i32 d0, d1, d2" 120821f3 0x0 (seq empty (set d0 (<< (cast 64 false (ite (== (cast 32 false (>> (var d1) (bv 8 0x0) false)) (cast 32 false (>> (var d2) (bv 8 0x0) false))) (~ (bv 32 0x0)) (bv 32 0x0))) (bv 8 0x0) false)) (set d0 (<< (cast 64 false (ite (== (cast 32 false (>> (var d1) (bv 8 0x20) false)) (cast 32 false (>> (var d2) (bv 8 0x20) false))) (~ (bv 32 0x0)) (bv 32 0x0))) (bv 8 0x20) false)))
d "vceq.f32 d0, d1, d2" 020e01f2 0x0 (seq empty (set d0 (<< (cast 64 false (ite (! (|| (|| (is_nan (float 0 (cast 32 false (>> (var d1) (bv 8 0x0) false)) )) (is_nan (float 0 (cast 32 false (>> (var d2) (bv 8 0x0) false)) ))) (|| (<. (float 0 (cast 32 false (>> (var d1) (bv 8 0x0) false)) ) (float 0 (cast 32 false (>> (var d2) (bv 8 0x0) false)) )) (<. (float 0 (cast 32 false (>> (var d2) (bv 8 0x0) false)) ) (float 0 (cast 32 false (>> (var d1) (bv 8 0x0) false)) ))))) (~ (bv 32 0x0)) (bv 32 0x0))) (bv 8 0x0) false)) (set d0 (<< (cast 64 false (ite (! (|| (|| (is_nan (float 0 (cast 32 false (>> (var d1) (bv 8 0x20) false)) )) (is_nan (float 0 (cast 32 false (>> (var d2) (bv 8 0x20) false)) ))) (|| (<. (float 0 (cast 32 false (>> (var d1) (bv 8 0x20) false)) ) (float 0 (cast 32 false (>> (var d2) (bv 8 0x20) false)) )) (<. (float 0 (cast 32 false (>> (var d2) (bv 8 0x20) false)) ) (float 0 (cast 32 false (>> (var d1) (bv 8 0x20) false)) ))))) (~ (bv 32 0x0)) (bv 32 0x0))) (bv 8 0x20) false)))
d "vcge.s8 d0, d1, d2" 120301f2 0x0 (seq empty (set d0 (<< (cast 64 false (ite (|| (! (sle (cast 8 false (>> (var d1) (bv 8 0x0) false)) (cast 8 false (>> (var d2) (bv 8 0x0) false)))) (== (cast 8 false (>> (var d1) (bv 8 0x0) false)) (cast 8 false (>> (var d2) (bv 8 0x0) false)))) (~ (bv 8 0x0)) (bv 8 0x0))) (bv 8 0x0) false)) (set d0 (<< (cast 64 false (ite (|| (! (sle (cast 8 false (>> (var d1) (bv 8 0x8) false)) (cast 8 false (>> (var d2) (bv 8 0x8) false)))) (== (cast 8 false (>> (var d1) (bv 8 0x8) false)) (cast 8 false (>> (var d2) (bv 8 0x8) false)))) (~ (bv 8 0x0)) (bv 8 0x0))) (bv 8 0x8) false)) (set d0 (<< (cast 64 false (ite (|| (! (sle (cast 8 false (>> (var d1) (bv 8 0x10) false)) (cast 8 false (>> (var d2) (bv 8 0x10) false)))) (== (cast 8 false (>> (var d1) (bv 8 0x10) false)) (cast 8 false (>> (var d2) (bv 8 0x10) false)))) (~ (bv 8 0x0)) (bv 8 0x0))) (bv 8 0x10) false)) (set d0 (<< (cast 64 false (ite (|| (! (sle (cast 8 false (>> (var d1) (bv 8 0x18) false)) (cast 8 false (>> (var d2) (bv 8 0x18) false)))) (== (cast 8 false (>> (var d1) (bv 8 0x18) false)) (cast 8 false (>> (var d2) (bv 8 0x18) false)))) (~ (bv 8 0x0)) (bv 8 0x0))) (bv 8 0x18) false)) (set d0 (<< (cast 64 false (ite (|| (! (sle (cast 8 false (>> (var d1) (bv 8 0x20) false)) (cast 8 false (>> (var d2) (bv 8 0x20) false)))) (== (cast 8 false (>> (var d1) (bv 8 0x20) false)) (cast 8 false (>> (var d2) (bv 8 0x20) false)))) (~ (bv 8 0x0)) (bv 8 0x0))) (bv 8 0x20) false)) (set d0 (<< (cast 64 false (ite (|| (! (sle (cast 8 false (>> (var d1) (bv 8 0x28) false)) (cast 8 false (>> (var d2) (bv 8 0x28) false)))) (== (cast 8 false (>> (var d1) (bv 8 0x28) false)) (cast 8 false (>> (var d2) (bv 8 0x28) false)))) (~ (bv 8 0x0)) (bv 8 0x0))) (bv 8 0x28) false)) (set d0 (<< (cast 64 false (ite (|| (! (sle (cast 8 false (>> (var d1) (bv 8 0x30) false)) (cast 8 false (>> (var d2) (bv 8 0x30) false)))) (== (cast 8 false (>> (var d1) (bv 8 0x30) false)) (cast 8 false (>> (var d2) (bv 8 0x30) false)))) (~ (bv 8 0x0)) (bv 8 0x0))) (bv 8 0x30) false)) (set d0 (<< (cast 64 false (ite (|| (! (sle (cast 8 false (>> (var d1) (bv 8 0x38) false)) (cast 8 false (>> (var d2) (bv 8 0x38) false)))) (== (cast 8 false (>> (var d1) (bv 8 0x38) false)) (cast 8 false (>> (var d2) (bv 8 0x38) false)))) (~ (bv 8 0x0)) (bv 8 0x0))) (bv 8 0x38) false)))
d "vcge.s16 d0, d1, d2" 120311f2 0x0 (seq empty (set d0 (<< (cast 64 false (ite (|| (! (sle (cast 16 false (>> (var d1) (bv 8 0x0) false)) (cast 16 false (>> (var d2) (bv 8 0x0) false)))) (== (cast 16 false (>> (var d1) (bv 8 0x0) false)) (cast 16 false (>> (var d2) (bv 8 0x0) false)))) (~ (bv 16 0x0)) (bv 16 0x0))) (bv 8 0x0) false)) (set d0 (<< (cast 64 false (ite (|| (! (sle (cast 16 false (>> (var d1) (bv 8 0x10) false)) (cast 16 false (>> (var d2) (bv 8 0x10) false)))) (== (cast 16 false (>> (var d1) (bv 8 0x10) false)) (cast 16 false (>> (var d2) (bv 8 0x10) false)))) (~ (bv 16 0x0)) (bv 16 0x0))) (bv 8 0x10) false)) (set d0 (<< (cast 64 false (ite (|| (! (sle (cast 16 false (>> (var d1) (bv 8 0x20) false)) (cast 16 false (>> (var d2) (bv 8 0x20) false)))) (== (cast 16 false (>> (var d1) (bv 8 0x20) false)) (cast 16 false (>> (var d2) (bv 8 0x20) false)))) (~ (bv 16 0x0)) (bv 16 0x0))) (bv 8 0x20) false)) (set d0 (<< (cast 64 false (ite (|| (! (sle (cast 16 false (>> (var d1) (bv 8 0x30) false)) (cast 16 false (>> (var d2) (bv 8 0x30) false)))) (== (cast 16 false (>> (var d1) (bv 8 0x30) false)) (cast 16 false (>> (var d2) (bv 8 0x30) false)))) (~ (bv 16 0x0)) (bv 16 0x0))) (bv 8 0x30) false)))
d "vcge.s32 d0, d1, d2" 120321f2 0x0 (seq empty (set d0 (<< (cast 64 false (ite (|| (! (sle (cast 32 false (>> (var d1) (bv 8 0x0) false)) (cast 32 false (>> (var d2) (bv 8 0x0) false)))) (== (cast 32 false (>> (var d1) (bv 8 0x0) false)) (cast 32 false (>> (var d2) (bv 8 0x0) false)))) (~ (bv 32 0x0)) (bv 32 0x0))) (bv 8 0x0) false)) (set d0 (<< (cast 64 false (ite (|| (! (sle (cast 32 false (>> (var d1) (bv 8 0x20) false)) (cast 32 false (>> (var d2) (bv 8 0x20) false)))) (== (cast 32 false (>> (var d1) (bv 8 0x20) false)) (cast 32 false (>> (var d2) (bv 8 0x20) false)))) (~ (bv 32 0x0)) (bv 32 0x0))) (bv 8 0x20) false)))
d "vcge.u8 d0, d1, d2" 120301f3 0x0 (seq empty (set d0 (<< (cast 64 false (ite (|| (! (ule (cast 8 false (>> (var d1) (bv 8 0x0) false)) (cast 8 false (>> (var d2) (bv 8 0x0) false)))) (== (cast 8 false (>> (var d1) (bv 8 0x0) false)) (cast 8 false (>> (var d2) (bv 8 0x0) false)))) (~ (bv 8 0x0)) (bv 8 0x0))) (bv 8 0x0) false)) (set d0 (<< (cast 64 false (ite (|| (! (ule (cast 8 false (>> (var d1) (bv 8 0x8) false)) (cast 8 false (>> (var d2) (bv 8 0x8) false)))) (== (cast 8 false (>> (var d1) (bv 8 0x8) false)) (cast 8 false (>> (var d2) (bv 8 0x8) false)))) (~ (bv 8 0x0)) (bv 8 0x0))) (bv 8 0x8) false)) (set d0 (<< (cast 64 false (ite (|| (! (ule (cast 8 false (>> (var d1) (bv 8 0x10) false)) (cast 8 false (>> (var d2) (bv 8 0x10) false)))) (== (cast 8 false (>> (var d1) (bv 8 0x10) false)) (cast 8 false (>> (var d2) (bv 8 0x10) false)))) (~ (bv 8 0x0)) (bv 8 0x0))) (bv 8 0x10) false)) (set d0 (<< (cast 64 false (ite (|| (! (ule (cast 8 false (>> (var d1) (bv 8 0x18) false)) (cast 8 false (>> (var d2) (bv 8 0x18) false)))) (== (cast 8 false (>> (var d1) (bv 8 0x18) false)) (cast 8 false (>> (var d2) (bv 8 0x18) false)))) (~ (bv 8 0x0)) (bv 8 0x0))) (bv 8 0x18) false)) (set d0 (<< (cast 64 false (ite (|| (! (ule (cast 8 false (>> (var d1) (bv 8 0x20) false)) (cast 8 false (>> (var d2) (bv 8 0x20) false)))) (== (cast 8 false (>> (var d1) (bv 8 0x20) false)) (cast 8 false (>> (var d2) (bv 8 0x20) false)))) (~ (bv 8 0x0)) (bv 8 0x0))) (bv 8 0x20) false)) (set d0 (<< (cast 64 false (ite (|| (! (ule (cast 8 false (>> (var d1) (bv 8 0x28) false)) (cast 8 false (>> (var d2) (bv 8 0x28) false)))) (== (cast 8 false (>> (var d1) (bv 8 0x28) false)) (cast 8 false (>> (var d2) (bv 8 0x28) false)))) (~ (bv 8 0x0)) (bv 8 0x0))) (bv 8 0x28) false)) (set d0 (<< (cast 64 false (ite (|| (! (ule (cast 8 false (>> (var d1) (bv 8 0x30) false)) (cast 8 false (>> (var d2) (bv 8 0x30) false)))) (== (cast 8 false (>> (var d1) (bv 8 0x30) false)) (cast 8 false (>> (var d2) (bv 8 0x30) false)))) (~ (bv 8 0x0)) (bv 8 0x0))) (bv 8 0x30) false)) (set d0 (<< (cast 64 false (ite (|| (! (ule (cast 8 false (>> (var d1) (bv 8 0x38) false)) (cast 8 false (>> (var d2) (bv 8 0x38) false)))) (== (cast 8 false (>> (var d1) (bv 8 0x38) false)) (cast 8 false (>> (var d2) (bv 8 0x38) false)))) (~ (bv 8 0x0)) (bv 8 0x0))) (bv 8 0x38) false)))
d "vcge.u16 d0, d1, d2" 120311f3 0x0 (seq empty (set d0 (<< (cast 64 false (ite (|| (! (ule (cast 16 false (>> (var d1) (bv 8 0x0) false)) (cast 16 false (>> (var d2) (bv 8 0x0) false)))) (== (cast 16 false (>> (var d1) (bv 8 0x0) false)) (cast 16 false (>> (var d2) (bv 8 0x0) false)))) (~ (bv 16 0x0)) (bv 16 0x0))) (bv 8 0x0) false)) (set d0 (<< (cast 64 false (ite (|| (! (ule (cast 16 false (>> (var d1) (bv 8 0x10) false)) (cast 16 false (>> (var d2) (bv 8 0x10) false)))) (== (cast 16 false (>> (var d1) (bv 8 0x10) false)) (cast 16 false (>> (var d2) (bv 8 0x10) false)))) (~ (bv 16 0x0)) (bv 16 0x0))) (bv 8 0x10) false)) (set d0 (<< (cast 64 false (ite (|| (! (ule (cast 16 false (>> (var d1) (bv 8 0x20) false)) (cast 16 false (>> (var d2) (bv 8 0x20) false)))) (== (cast 16 false (>> (var d1) (bv 8 0x20) false)) (cast 16 false (>> (var d2) (bv 8 0x20) false)))) (~ (bv 16 0x0)) (bv 16 0x0))) (bv 8 0x20) false)) (set d0 (<< (cast 64 false (ite (|| (! (ule (cast 16 false (>> (var d1) (bv 8 0x30) false)) (cast 16 false (>> (var d2) (bv 8 0x30) false)))) (== (cast 16 false (>> (var d1) (bv 8 0x30) false)) (cast 16 false (>> (var d2) (bv 8 0x30) false)))) (~ (bv 16 0x0)) (bv 16 0x0))) (bv 8 0x30) false)))
d "vcge.u32 d0, d1, d2" 120321f3 0x0 (seq empty (set d0 (<< (cast 64 false (ite (|| (! (ule (cast 32 false (>> (var d1) (bv 8 0x0) false)) (cast 32 false (>> (var d2) (bv 8 0x0) false)))) (== (cast 32 false (>> (var d1) (bv 8 0x0) false)) (cast 32 false (>> (var d2) (bv 8 0x0) false)))) (~ (bv 32 0x0)) (bv 32 0x0))) (bv 8 0x0) false)) (set d0 (<< (cast 64 false (ite (|| (! (ule (cast 32 false (>> (var d1) (bv 8 0x20) false)) (cast 32 false (>> (var d2) (bv 8 0x20) false)))) (== (cast 32 false (>> (var d1) (bv 8 0x20) false)) (cast 32 false (>> (var d2) (bv 8 0x20) false)))) (~ (bv 32 0x0)) (bv 32 0x0))) (bv 8 0x20) false)))
d "vcge.f32 d0, d1, d2" 020e01f3 0x0 (seq empty (set d0 (<< (cast 64 false (ite (! (<. (float 0 (cast 32 false (>> (var d1) (bv 8 0x0) false)) ) (float 0 (cast 32 false (>> (var d2) (bv 8 0x0) false)) ))) (~ (bv 32 0x0)) (bv 32 0x0))) (bv 8 0x0) false)) (set d0 (<< (cast 64 false (ite (! (<. (float 0 (cast 32 false (>> (var d1) (bv 8 0x20) false)) ) (float 0 (cast 32 false (>> (var d2) (bv 8 0x20) false)) ))) (~ (bv 32 0x0)) (bv 32 0x0))) (bv 8 0x20) false)))
d "vcge.s16 d0, d1, 0" 8100b5f3 0x0 (seq empty (set d0 (<< (cast 64 false (ite (|| (! (sle (cast 16 false (>> (var d1) (bv 8 0x0) false)) (bv 16 0x0))) (== (cast 16 false (>> (var d1) (bv 8 0x0) false)) (bv 16 0x0))) (~ (bv 16 0x0)) (bv 16 0x0))) (bv 8 0x0) false)) (set d0 (<< (cast 64 false (ite (|| (! (sle (cast 16 false (>> (var d1) (bv 8 0x10) false)) (bv 16 0x0))) (== (cast 16 false (>> (var d1) (bv 8 0x10) false)) (bv 16 0x0))) (~ (bv 16 0x0)) (bv 16 0x0))) (bv 8 0x10) false)) (set d0 (<< (cast 64 false (ite (|| (! (sle (cast 16 false (>> (var d1) (bv 8 0x20) false)) (bv 16 0x0))) (== (cast 16 false (>> (var d1) (bv 8 0x20) false)) (bv 16 0x0))) (~ (bv 16 0x0)) (bv 16 0x0))) (bv 8 0x20) false)) (set d0 (<< (cast 64 false (ite (|| (! (sle (cast 16 false (>> (var d1) (bv 8 0x30) false)) (bv 16 0x0))) (== (cast 16 false (>> (var d1) (bv 8 0x30) false)) (bv 16 0x0))) (~ (bv 16 0x0)) (bv 16 0x0))) (bv 8 0x30) false)))
d "vcge.f32 d0, d1, 0" 8104b9f3 0x0 (seq empty (set d0 (<< (cast 64 false (ite (! (<. (float 0 (cast 32 false (>> (var d1) (bv 8 0x0) false)) ) (float 0 (bv 32 0x0) ))) (~ (bv 32 0x0)) (bv 32 0x0))) (bv 8 0x0) false)) (set d0 (<< (cast 64 false (ite (! (<. (float 0 (cast 32 false (>> (var d1) (bv 8 0x20) false)) ) (float 0 (bv 32 0x0) ))) (~ (bv 32 0x0)) (bv 32 0x0))) (bv 8 0x20) false)))
d "vcgt.s8 d0, d1, d2" 020301f2 0x0 (seq empty (set d0 (<< (cast 64 false (ite (! (sle (cast 8 false (>> (var d1) (bv 8 0x0) false)) (cast 8 false (>> (var d2) (bv 8 0x0) false)))) (~ (bv 8 0x0)) (bv 8 0x0))) (bv 8 0x0) false)) (set d0 (<< (cast 64 false (ite (! (sle (cast 8 false (>> (var d1) (bv 8 0x8) false)) (cast 8 false (>> (var d2) (bv 8 0x8) false)))) (~ (bv 8 0x0)) (bv 8 0x0))) (bv 8 0x8) false)) (set d0 (<< (cast 64 false (ite (! (sle (cast 8 false (>> (var d1) (bv 8 0x10) false)) (cast 8 false (>> (var d2) (bv 8 0x10) false)))) (~ (bv 8 0x0)) (bv 8 0x0))) (bv 8 0x10) false)) (set d0 (<< (cast 64 false (ite (! (sle (cast 8 false (>> (var d1) (bv 8 0x18) false)) (cast 8 false (>> (var d2) (bv 8 0x18) false)))) (~ (bv 8 0x0)) (bv 8 0x0))) (bv 8 0x18) false)) (set d0 (<< (cast 64 false (ite (! (sle (cast 8 false (>> (var d1) (bv 8 0x20) false)) (cast 8 false (>> (var d2) (bv 8 0x20) false)))) (~ (bv 8 0x0)) (bv 8 0x0))) (bv 8 0x20) false)) (set d0 (<< (cast 64 false (ite (! (sle (cast 8 false (>> (var d1) (bv 8 0x28) false)) (cast 8 false (>> (var d2) (bv 8 0x28) false)))) (~ (bv 8 0x0)) (bv 8 0x0))) (bv 8 0x28) false)) (set d0 (<< (cast 64 false (ite (! (sle (cast 8 false (>> (var d1) (bv 8 0x30) false)) (cast 8 false (>> (var d2) (bv 8 0x30) false)))) (~ (bv 8 0x0)) (bv 8 0x0))) (bv 8 0x30) false)) (set d0 (<< (cast 64 false (ite (! (sle (cast 8 false (>> (var d1) (bv 8 0x38) false)) (cast 8 false (>> (var d2) (bv 8 0x38) false)))) (~ (bv 8 0x0)) (bv 8 0x0))) (bv 8 0x38) false)))
d "vcgt.s16 d0, d1, d2" 020311f2 0x0 (seq empty (set d0 (<< (cast 64 false (ite (! (sle (cast 16 false (>> (var d1) (bv 8 0x0) false)) (cast 16 false (>> (var d2) (bv 8 0x0) false)))) (~ (bv 16 0x0)) (bv 16 0x0))) (bv 8 0x0) false)) (set d0 (<< (cast 64 false (ite (! (sle (cast 16 false (>> (var d1) (bv 8 0x10) false)) (cast 16 false (>> (var d2) (bv 8 0x10) false)))) (~ (bv 16 0x0)) (bv 16 0x0))) (bv 8 0x10) false)) (set d0 (<< (cast 64 false (ite (! (sle (cast 16 false (>> (var d1) (bv 8 0x20) false)) (cast 16 false (>> (var d2) (bv 8 0x20) false)))) (~ (bv 16 0x0)) (bv 16 0x0))) (bv 8 0x20) false)) (set d0 (<< (cast 64 false (ite (! (sle (cast 16 false (>> (var d1) (bv 8 0x30) false)) (cast 16 false (>> (var d2) (bv 8 0x30) false)))) (~ (bv 16 0x0)) (bv 16 0x0))) (bv 8 0x30) false)))
d "vcgt.s32 d0, d1, d2" 020321f2 0x0 (seq empty (set d0 (<< (cast 64 false (ite (! (sle (cast 32 false (>> (var d1) (bv 8 0x0) false)) (cast 32 false (>> (var d2) (bv 8 0x0) false)))) (~ (bv 32 0x0)) (bv 32 0x0))) (bv 8 0x0) false)) (set d0 (<< (cast 64 false (ite (! (sle (cast 32 false (>> (var d1) (bv 8 0x20) false)) (cast 32 false (>> (var d2) (bv 8 0x20) false)))) (~ (bv 32 0x0)) (bv 32 0x0))) (bv 8 0x20) false)))
d "vcgt.u8 d0, d1, d2" 020301f3 0x0 (seq empty (set d0 (<< (cast 64 false (ite (! (ule (cast 8 false (>> (var d1) (bv 8 0x0) false)) (cast 8 false (>> (var d2) (bv 8 0x0) false)))) (~ (bv 8 0x0)) (bv 8 0x0))) (bv 8 0x0) false)) (set d0 (<< (cast 64 false (ite (! (ule (cast 8 false (>> (var d1) (bv 8 0x8) false)) (cast 8 false (>> (var d2) (bv 8 0x8) false)))) (~ (bv 8 0x0)) (bv 8 0x0))) (bv 8 0x8) false)) (set d0 (<< (cast 64 false (ite (! (ule (cast 8 false (>> (var d1) (bv 8 0x10) false)) (cast 8 false (>> (var d2) (bv 8 0x10) false)))) (~ (bv 8 0x0)) (bv 8 0x0))) (bv 8 0x10) false)) (set d0 (<< (cast 64 false (ite (! (ule (cast 8 false (>> (var d1) (bv 8 0x18) false)) (cast 8 false (>> (var d2) (bv 8 0x18) false)))) (~ (bv 8 0x0)) (bv 8 0x0))) (bv 8 0x18) false)) (set d0 (<< (cast 64 false (ite (! (ule (cast 8 false (>> (var d1) (bv 8 0x20) false)) (cast 8 false (>> (var d2) (bv 8 0x20) false)))) (~ (bv 8 0x0)) (bv 8 0x0))) (bv 8 0x20) false)) (set d0 (<< (cast 64 false (ite (! (ule (cast 8 false (>> (var d1) (bv 8 0x28) false)) (cast 8 false (>> (var d2) (bv 8 0x28) false)))) (~ (bv 8 0x0)) (bv 8 0x0))) (bv 8 0x28) false)) (set d0 (<< (cast 64 false (ite (! (ule (cast 8 false (>> (var d1) (bv 8 0x30) false)) (cast 8 false (>> (var d2) (bv 8 0x30) false)))) (~ (bv 8 0x0)) (bv 8 0x0))) (bv 8 0x30) false)) (set d0 (<< (cast 64 false (ite (! (ule (cast 8 false (>> (var d1) (bv 8 0x38) false)) (cast 8 false (>> (var d2) (bv 8 0x38) false)))) (~ (bv 8 0x0)) (bv 8 0x0))) (bv 8 0x38) false)))
d "vcgt.u16 d0, d1, d2" 020311f3 0x0 (seq empty (set d0 (<< (cast 64 false (ite (! (ule (cast 16 false (>> (var d1) (bv 8 0x0) false)) (cast 16 false (>> (var d2) (bv 8 0x0) false)))) (~ (bv 16 0x0)) (bv 16 0x0))) (bv 8 0x0) false)) (set d0 (<< (cast 64 false (ite (! (ule (cast 16 false (>> (var d1) (bv 8 0x10) false)) (cast 16 false (>> (var d2) (bv 8 0x10) false)))) (~ (bv 16 0x0)) (bv 16 0x0))) (bv 8 0x10) false)) (set d0 (<< (cast 64 false (ite (! (ule (cast 16 false (>> (var d1) (bv 8 0x20) false)) (cast 16 false (>> (var d2) (bv 8 0x20) false)))) (~ (bv 16 0x0)) (bv 16 0x0))) (bv 8 0x20) false)) (set d0 (<< (cast 64 false (ite (! (ule (cast 16 false (>> (var d1) (bv 8 0x30) false)) (cast 16 false (>> (var d2) (bv 8 0x30) false)))) (~ (bv 16 0x0)) (bv 16 0x0))) (bv 8 0x30) false)))
d "vcgt.u32 d0, d1, d2" 020321f3 0x0 (seq empty (set d0 (<< (cast 64 false (ite (! (ule (cast 32 false (>> (var d1) (bv 8 0x0) false)) (cast 32 false (>> (var d2) (bv 8 0x0) false)))) (~ (bv 32 0x0)) (bv 32 0x0))) (bv 8 0x0) false)) (set d0 (<< (cast 64 false (ite (! (ule (cast 32 false (>> (var d1) (bv 8 0x20) false)) (cast 32 false (>> (var d2) (bv 8 0x20) false)))) (~ (bv 32 0x0)) (bv 32 0x0))) (bv 8 0x20) false)))
d "vcgt.f32 d0, d1, d2" 020e21f3 0x0 (seq empty (set d0 (<< (cast 64 false (ite (<. (float 0 (cast 32 false (>> (var d2) (bv 8 0x0) false)) ) (float 0 (cast 32 false (>> (var d1) (bv 8 0x0) false)) )) (~ (bv 32 0x0)) (bv 32 0x0))) (bv 8 0x0) false)) (set d0 (<< (cast 64 false (ite (<. (float 0 (cast 32 false (>> (var d2) (bv 8 0x20) false)) ) (float 0 (cast 32 false (>> (var d1) (bv 8 0x20) false)) )) (~ (bv 32 0x0)) (bv 32 0x0))) (bv 8 0x20) false)))
d "vcgt.s16 d0, d1, 0" 0100b5f3 0x0 (seq empty (set d0 (<< (cast 64 false (ite (! (sle (cast 16 false (>> (var d1) (bv 8 0x0) false)) (bv 16 0x0))) (~ (bv 16 0x0)) (bv 16 0x0))) (bv 8 0x0) false)) (set d0 (<< (cast 64 false (ite (! (sle (cast 16 false (>> (var d1) (bv 8 0x10) false)) (bv 16 0x0))) (~ (bv 16 0x0)) (bv 16 0x0))) (bv 8 0x10) false)) (set d0 (<< (cast 64 false (ite (! (sle (cast 16 false (>> (var d1) (bv 8 0x20) false)) (bv 16 0x0))) (~ (bv 16 0x0)) (bv 16 0x0))) (bv 8 0x20) false)) (set d0 (<< (cast 64 false (ite (! (sle (cast 16 false (>> (var d1) (bv 8 0x30) false)) (bv 16 0x0))) (~ (bv 16 0x0)) (bv 16 0x0))) (bv 8 0x30) false)))
d "vcgt.f32 d0, d1, 0" 0104b9f3 0x0 (seq empty (set d0 (<< (cast 64 false (ite (<. (float 0 (bv 32 0x0) ) (float 0 (cast 32 false (>> (var d1) (bv 8 0x0) false)) )) (~ (bv 32 0x0)) (bv 32 0x0))) (bv 8 0x0) false)) (set d0 (<< (cast 64 false (ite (<. (float 0 (bv 32 0x0) ) (float 0 (cast 32 false (>> (var d1) (bv 8 0x20) false)) )) (~ (bv 32 0x0)) (bv 32 0x0))) (bv 8 0x20) false)))
d "vcge.s8 d0, d2, d1" 110302f2 0x0 (seq empty (set d0 (<< (cast 64 false (ite (|| (! (sle (cast 8 false (>> (var d2) (bv 8 0x0) false)) (cast 8 false (>> (var d1) (bv 8 0x0) false)))) (== (cast 8 false (>> (var d2) (bv 8 0x0) false)) (cast 8 false (>> (var d1) (bv 8 0x0) false)))) (~ (bv 8 0x0)) (bv 8 0x0))) (bv 8 0x0) false)) (set d0 (<< (cast 64 false (ite (|| (! (sle (cast 8 false (>> (var d2) (bv 8 0x8) false)) (cast 8 false (>> (var d1) (bv 8 0x8) false)))) (== (cast 8 false (>> (var d2) (bv 8 0x8) false)) (cast 8 false (>> (var d1) (bv 8 0x8) false)))) (~ (bv 8 0x0)) (bv 8 0x0))) (bv 8 0x8) false)) (set d0 (<< (cast 64 false (ite (|| (! (sle (cast 8 false (>> (var d2) (bv 8 0x10) false)) (cast 8 false (>> (var d1) (bv 8 0x10) false)))) (== (cast 8 false (>> (var d2) (bv 8 0x10) false)) (cast 8 false (>> (var d1) (bv 8 0x10) false)))) (~ (bv 8 0x0)) (bv 8 0x0))) (bv 8 0x10) false)) (set d0 (<< (cast 64 false (ite (|| (! (sle (cast 8 false (>> (var d2) (bv 8 0x18) false)) (cast 8 false (>> (var d1) (bv 8 0x18) false)))) (== (cast 8 false (>> (var d2) (bv 8 0x18) false)) (cast 8 false (>> (var d1) (bv 8 0x18) false)))) (~ (bv 8 0x0)) (bv 8 0x0))) (bv 8 0x18) false)) (set d0 (<< (cast 64 false (ite (|| (! (sle (cast 8 false (>> (var d2) (bv 8 0x20) false)) (cast 8 false (>> (var d1) (bv 8 0x20) false)))) (== (cast 8 false (>> (var d2) (bv 8 0x20) false)) (cast 8 false (>> (var d1) (bv 8 0x20) false)))) (~ (bv 8 0x0)) (bv 8 0x0))) (bv 8 0x20) false)) (set d0 (<< (cast 64 false (ite (|| (! (sle (cast 8 false (>> (var d2) (bv 8 0x28) false)) (cast 8 false (>> (var d1) (bv 8 0x28) false)))) (== (cast 8 false (>> (var d2) (bv 8 0x28) false)) (cast 8 false (>> (var d1) (bv 8 0x28) false)))) (~ (bv 8 0x0)) (bv 8 0x0))) (bv 8 0x28) false)) (set d0 (<< (cast 64 false (ite (|| (! (sle (cast 8 false (>> (var d2) (bv 8 0x30) false)) (cast 8 false (>> (var d1) (bv 8 0x30) false)))) (== (cast 8 false (>> (var d2) (bv 8 0x30) false)) (cast 8 false (>> (var d1) (bv 8 0x30) false)))) (~ (bv 8 0x0)) (bv 8 0x0))) (bv 8 0x30) false)) (set d0 (<< (cast 64 false (ite (|| (! (sle (cast 8 false (>> (var d2) (bv 8 0x38) false)) (cast 8 false (>> (var d1) (bv 8 0x38) false)))) (== (cast 8 false (>> (var d2) (bv 8 0x38) false)) (cast 8 false (>> (var d1) (bv 8 0x38) false)))) (~ (bv 8 0x0)) (bv 8 0x0))) (bv 8 0x38) false)))
d "vcge.s16 d0, d2, d1" 110312f2 0x0 (seq empty (set d0 (<< (cast 64 false (ite (|| (! (sle (cast 16 false (>> (var d2) (bv 8 0x0) false)) (cast 16 false (>> (var d1) (bv 8 0x0) false)))) (== (cast 16 false (>> (var d2) (bv 8 0x0) false)) (cast 16 false (>> (var d1) (bv 8 0x0) false)))) (~ (bv 16 0x0)) (bv 16 0x0))) (bv 8 0x0) false)) (set d0 (<< (cast 64 false (ite (|| (! (sle (cast 16 false (>> (var d2) (bv 8 0x10) false)) (cast 16 false (>> (var d1) (bv 8 0x10) false)))) (== (cast 16 false (>> (var d2) (bv 8 0x10) false)) (cast 16 false (>> (var d1) (bv 8 0x10) false)))) (~ (bv 16 0x0)) (bv 16 0x0))) (bv 8 0x10) false)) (set d0 (<< (cast 64 false (ite (|| (! (sle (cast 16 false (>> (var d2) (bv 8 0x20) false)) (cast 16 false (>> (var d1) (bv 8 0x20) false)))) (== (cast 16 false (>> (var d2) (bv 8 0x20) false)) (cast 16 false (>> (var d1) (bv 8 0x20) false)))) (~ (bv 16 0x0)) (bv 16 0x0))) (bv 8 0x20) false)) (set d0 (<< (cast 64 false (ite (|| (! (sle (cast 16 false (>> (var d2) (bv 8 0x30) false)) (cast 16 false (>> (var d1) (bv 8 0x30) false)))) (== (cast 16 false (>> (var d2) (bv 8 0x30) false)) (cast 16 false (>> (var d1) (bv 8 0x30) false)))) (~ (bv 16 0x0)) (bv 16 0x0))) (bv 8 0x30) false)))
d "vcge.s32 d0, d2, d1" 110322f2 0x0 (seq empty (set d0 (<< (cast 64 false (ite (|| (! (sle (cast 32 false (>> (var d2) (bv 8 0x0) false)) (cast 32 false (>> (var d1) (bv 8 0x0) false)))) (== (cast 32 false (>> (var d2) (bv 8 0x0) false)) (cast 32 false (>> (var d1) (bv 8 0x0) false)))) (~ (bv 32 0x0)) (bv 32 0x0))) (bv 8 0x0) false)) (set d0 (<< (cast 64 false (ite (|| (! (sle (cast 32 false (>> (var d2) (bv 8 0x20) false)) (cast 32 false (>> (var d1) (bv 8 0x20) false)))) (== (cast 32 false (>> (var d2) (bv 8 0x20) false)) (cast 32 false (>> (var d1) (bv 8 0x20) false)))) (~ (bv 32 0x0)) (bv 32 0x0))) (bv 8 0x20) false)))
d "vcge.u8 d0, d2, d1" 110302f3 0x0 (seq empty (set d0 (<< (cast 64 false (ite (|| (! (ule (cast 8 false (>> (var d2) (bv 8 0x0) false)) (cast 8 false (>> (var d1) (bv 8 0x0) false)))) (== (cast 8 false (>> (var d2) (bv 8 0x0) false)) (cast 8 false (>> (var d1) (bv 8 0x0) false)))) (~ (bv 8 0x0)) (bv 8 0x0))) (bv 8 0x0) false)) (set d0 (<< (cast 64 false (ite (|| (! (ule (cast 8 false (>> (var d2) (bv 8 0x8) false)) (cast 8 false (>> (var d1) (bv 8 0x8) false)))) (== (cast 8 false (>> (var d2) (bv 8 0x8) false)) (cast 8 false (>> (var d1) (bv 8 0x8) false)))) (~ (bv 8 0x0)) (bv 8 0x0))) (bv 8 0x8) false)) (set d0 (<< (cast 64 false (ite (|| (! (ule (cast 8 false (>> (var d2) (bv 8 0x10) false)) (cast 8 false (>> (var d1) (bv 8 0x10) false)))) (== (cast 8 false (>> (var d2) (bv 8 0x10) false)) (cast 8 false (>> (var d1) (bv 8 0x10) false)))) (~ (bv 8 0x0)) (bv 8 0x0))) (bv 8 0x10) false)) (set d0 (<< (cast 64 false (ite (|| (! (ule (cast 8 false (>> (var d2) (bv 8 0x18) false)) (cast 8 false (>> (var d1) (bv 8 0x18) false)))) (== (cast 8 false (>> (var d2) (bv 8 0x18) false)) (cast 8 false (>> (var d1) (bv 8 0x18) false)))) (~ (bv 8 0x0)) (bv 8 0x0))) (bv 8 0x18) false)) (set d0 (<< (cast 64 false (ite (|| (! (ule (cast 8 false (>> (var d2) (bv 8 0x20) false)) (cast 8 false (>> (var d1) (bv 8 0x20) false)))) (== (cast 8 false (>> (var d2) (bv 8 0x20) false)) (cast 8 false (>> (var d1) (bv 8 0x20) false)))) (~ (bv 8 0x0)) (bv 8 0x0))) (bv 8 0x20) false)) (set d0 (<< (cast 64 false (ite (|| (! (ule (cast 8 false (>> (var d2) (bv 8 0x28) false)) (cast 8 false (>> (var d1) (bv 8 0x28) false)))) (== (cast 8 false (>> (var d2) (bv 8 0x28) false)) (cast 8 false (>> (var d1) (bv 8 0x28) false)))) (~ (bv 8 0x0)) (bv 8 0x0))) (bv 8 0x28) false)) (set d0 (<< (cast 64 false (ite (|| (! (ule (cast 8 false (>> (var d2) (bv 8 0x30) false)) (cast 8 false (>> (var d1) (bv 8 0x30) false)))) (== (cast 8 false (>> (var d2) (bv 8 0x30) false)) (cast 8 false (>> (var d1) (bv 8 0x30) false)))) (~ (bv 8 0x0)) (bv 8 0x0))) (bv 8 0x30) false)) (set d0 (<< (cast 64 false (ite (|| (! (ule (cast 8 false (>> (var d2) (bv 8 0x38) false)) (cast 8 false (>> (var d1) (bv 8 0x38) false)))) (== (cast 8 false (>> (var d2) (bv 8 0x38) false)) (cast 8 false (>> (var d1) (bv 8 0x38) false)))) (~ (bv 8 0x0)) (bv 8 0x0))) (bv 8 0x38) false)))
d "vcge.u16 d0, d2, d1" 110312f3 0x0 (seq empty (set d0 (<< (cast 64 false (ite (|| (! (ule (cast 16 false (>> (var d2) (bv 8 0x0) false)) (cast 16 false (>> (var d1) (bv 8 0x0) false)))) (== (cast 16 false (>> (var d2) (bv 8 0x0) false)) (cast 16 false (>> (var d1) (bv 8 0x0) false)))) (~ (bv 16 0x0)) (bv 16 0x0))) (bv 8 0x0) false)) (set d0 (<< (cast 64 false (ite (|| (! (ule (cast 16 false (>> (var d2) (bv 8 0x10) false)) (cast 16 false (>> (var d1) (bv 8 0x10) false)))) (== (cast 16 false (>> (var d2) (bv 8 0x10) false)) (cast 16 false (>> (var d1) (bv 8 0x10) false)))) (~ (bv 16 0x0)) (bv 16 0x0))) (bv 8 0x10) false)) (set d0 (<< (cast 64 false (ite (|| (! (ule (cast 16 false (>> (var d2) (bv 8 0x20) false)) (cast 16 false (>> (var d1) (bv 8 0x20) false)))) (== (cast 16 false (>> (var d2) (bv 8 0x20) false)) (cast 16 false (>> (var d1) (bv 8 0x20) false)))) (~ (bv 16 0x0)) (bv 16 0x0))) (bv 8 0x20) false)) (set d0 (<< (cast 64 false (ite (|| (! (ule (cast 16 false (>> (var d2) (bv 8 0x30) false)) (cast 16 false (>> (var d1) (bv 8 0x30) false)))) (== (cast 16 false (>> (var d2) (bv 8 0x30) false)) (cast 16 false (>> (var d1) (bv 8 0x30) false)))) (~ (bv 16 0x0)) (bv 16 0x0))) (bv 8 0x30) false)))
d "vcge.u32 d0, d2, d1" 110322f3 0x0 (seq empty (set d0 (<< (cast 64 false (ite (|| (! (ule (cast 32 false (>> (var d2) (bv 8 0x0) false)) (cast 32 false (>> (var d1) (bv 8 0x0) false)))) (== (cast 32 false (>> (var d2) (bv 8 0x0) false)) (cast 32 false (>> (var d1) (bv 8 0x0) false)))) (~ (bv 32 0x0)) (bv 32 0x0))) (bv 8 0x0) false)) (set d0 (<< (cast 64 false (ite (|| (! (ule (cast 32 false (>> (var d2) (bv 8 0x20) false)) (cast 32 false (>> (var d1) (bv 8 0x20) false)))) (== (cast 32 false (>> (var d2) (bv 8 0x20) false)) (cast 32 false (>> (var d1) (bv 8 0x20) false)))) (~ (bv 32 0x0)) (bv 32 0x0))) (bv 8 0x20) false)))
d "vcge.f32 d0, d2, d1" 010e02f3 0x0 (seq empty (set d0 (<< (cast 64 false (ite (! (<. (float 0 (cast 32 false (>> (var d2) (bv 8 0x0) false)) ) (float 0 (cast 32 false (>> (var d1) (bv 8 0x0) false)) ))) (~ (bv 32 0x0)) (bv 32 0x0))) (bv 8 0x0) false)) (set d0 (<< (cast 64 false (ite (! (<. (float 0 (cast 32 false (>> (var d2) (bv 8 0x20) false)) ) (float 0 (cast 32 false (>> (var d1) (bv 8 0x20) false)) ))) (~ (bv 32 0x0)) (bv 32 0x0))) (bv 8 0x20) false)))
d "vcle.s16 d0, d1, 0" 8101b5f3 0x0 (seq empty (set d0 (<< (cast 64 false (ite (sle (cast 16 false (>> (var d1) (bv 8 0x0) false)) (bv 16 0x0)) (~ (bv 16 0x0)) (bv 16 0x0))) (bv 8 0x0) false)) (set d0 (<< (cast 64 false (ite (sle (cast 16 false (>> (var d1) (bv 8 0x10) false)) (bv 16 0x0)) (~ (bv 16 0x0)) (bv 16 0x0))) (bv 8 0x10) false)) (set d0 (<< (cast 64 false (ite (sle (cast 16 false (>> (var d1) (bv 8 0x20) false)) (bv 16 0x0)) (~ (bv 16 0x0)) (bv 16 0x0))) (bv 8 0x20) false)) (set d0 (<< (cast 64 false (ite (sle (cast 16 false (>> (var d1) (bv 8 0x30) false)) (bv 16 0x0)) (~ (bv 16 0x0)) (bv 16 0x0))) (bv 8 0x30) false)))
d "vcle.f32 d0, d1, 0" 8105b9f3 0x0 (seq empty (set d0 (<< (cast 64 false (ite (! (<. (float 0 (bv 32 0x0) ) (float 0 (cast 32 false (>> (var d1) (bv 8 0x0) false)) ))) (~ (bv 32 0x0)) (bv 32 0x0))) (bv 8 0x0) false)) (set d0 (<< (cast 64 false (ite (! (<. (float 0 (bv 32 0x0) ) (float 0 (cast 32 false (>> (var d1) (bv 8 0x20) false)) ))) (~ (bv 32 0x0)) (bv 32 0x0))) (bv 8 0x20) false)))
d "vcgt.s8 d0, d2, d1" 010302f2 0x0 (seq empty (set d0 (<< (cast 64 false (ite (! (sle (cast 8 false (>> (var d2) (bv 8 0x0) false)) (cast 8 false (>> (var d1) (bv 8 0x0) false)))) (~ (bv 8 0x0)) (bv 8 0x0))) (bv 8 0x0) false)) (set d0 (<< (cast 64 false (ite (! (sle (cast 8 false (>> (var d2) (bv 8 0x8) false)) (cast 8 false (>> (var d1) (bv 8 0x8) false)))) (~ (bv 8 0x0)) (bv 8 0x0))) (bv 8 0x8) false)) (set d0 (<< (cast 64 false (ite (! (sle (cast 8 false (>> (var d2) (bv 8 0x10) false)) (cast 8 false (>> (var d1) (bv 8 0x10) false)))) (~ (bv 8 0x0)) (bv 8 0x0))) (bv 8 0x10) false)) (set d0 (<< (cast 64 false (ite (! (sle (cast 8 false (>> (var d2) (bv 8 0x18) false)) (cast 8 false (>> (var d1) (bv 8 0x18) false)))) (~ (bv 8 0x0)) (bv 8 0x0))) (bv 8 0x18) false)) (set d0 (<< (cast 64 false (ite (! (sle (cast 8 false (>> (var d2) (bv 8 0x20) false)) (cast 8 false (>> (var d1) (bv 8 0x20) false)))) (~ (bv 8 0x0)) (bv 8 0x0))) (bv 8 0x20) false)) (set d0 (<< (cast 64 false (ite (! (sle (cast 8 false (>> (var d2) (bv 8 0x28) false)) (cast 8 false (>> (var d1) (bv 8 0x28) false)))) (~ (bv 8 0x0)) (bv 8 0x0))) (bv 8 0x28) false)) (set d0 (<< (cast 64 false (ite (! (sle (cast 8 false (>> (var d2) (bv 8 0x30) false)) (cast 8 false (>> (var d1) (bv 8 0x30) false)))) (~ (bv 8 0x0)) (bv 8 0x0))) (bv 8 0x30) false)) (set d0 (<< (cast 64 false (ite (! (sle (cast 8 false (>> (var d2) (bv 8 0x38) false)) (cast 8 false (>> (var d1) (bv 8 0x38) false)))) (~ (bv 8 0x0)) (bv 8 0x0))) (bv 8 0x38) false)))
d "vcgt.s16 d0, d2, d1" 010312f2 0x0 (seq empty (set d0 (<< (cast 64 false (ite (! (sle (cast 16 false (>> (var d2) (bv 8 0x0) false)) (cast 16 false (>> (var d1) (bv 8 0x0) false)))) (~ (bv 16 0x0)) (bv 16 0x0))) (bv 8 0x0) false)) (set d0 (<< (cast 64 false (ite (! (sle (cast 16 false (>> (var d2) (bv 8 0x10) false)) (cast 16 false (>> (var d1) (bv 8 0x10) false)))) (~ (bv 16 0x0)) (bv 16 0x0))) (bv 8 0x10) false)) (set d0 (<< (cast 64 false (ite (! (sle (cast 16 false (>> (var d2) (bv 8 0x20) false)) (cast 16 false (>> (var d1) (bv 8 0x20) false)))) (~ (bv 16 0x0)) (bv 16 0x0))) (bv 8 0x20) false)) (set d0 (<< (cast 64 false (ite (! (sle (cast 16 false (>> (var d2) (bv 8 0x30) false)) (cast 16 false (>> (var d1) (bv 8 0x30) false)))) (~ (bv 16 0x0)) (bv 16 0x0))) (bv 8 0x30) false)))
d "vcgt.s32 d0, d2, d1" 010322f2 0x0 (seq empty (set d0 (<< (cast 64 false (ite (! (sle (cast 32 false (>> (var d2) (bv 8 0x0) false)) (cast 32 false (>> (var d1) (bv 8 0x0) false)))) (~ (bv 32 0x0)) (bv 32 0x0))) (bv 8 0x0) false)) (set d0 (<< (cast 64 false (ite (! (sle (cast 32 false (>> (var d2) (bv 8 0x20) false)) (cast 32 false (>> (var d1) (bv 8 0x20) false)))) (~ (bv 32 0x0)) (bv 32 0x0))) (bv 8 0x20) false)))
d "vcgt.u8 d0, d2, d1" 010302f3 0x0 (seq empty (set d0 (<< (cast 64 false (ite (! (ule (cast 8 false (>> (var d2) (bv 8 0x0) false)) (cast 8 false (>> (var d1) (bv 8 0x0) false)))) (~ (bv 8 0x0)) (bv 8 0x0))) (bv 8 0x0) false)) (set d0 (<< (cast 64 false (ite (! (ule (cast 8 false (>> (var d2) (bv 8 0x8) false)) (cast 8 false (>> (var d1) (bv 8 0x8) false)))) (~ (bv 8 0x0)) (bv 8 0x0))) (bv 8 0x8) false)) (set d0 (<< (cast 64 false (ite (! (ule (cast 8 false (>> (var d2) (bv 8 0x10) false)) (cast 8 false (>> (var d1) (bv 8 0x10) false)))) (~ (bv 8 0x0)) (bv 8 0x0))) (bv 8 0x10) false)) (set d0 (<< (cast 64 false (ite (! (ule (cast 8 false (>> (var d2) (bv 8 0x18) false)) (cast 8 false (>> (var d1) (bv 8 0x18) false)))) (~ (bv 8 0x0)) (bv 8 0x0))) (bv 8 0x18) false)) (set d0 (<< (cast 64 false (ite (! (ule (cast 8 false (>> (var d2) (bv 8 0x20) false)) (cast 8 false (>> (var d1) (bv 8 0x20) false)))) (~ (bv 8 0x0)) (bv 8 0x0))) (bv 8 0x20) false)) (set d0 (<< (cast 64 false (ite (! (ule (cast 8 false (>> (var d2) (bv 8 0x28) false)) (cast 8 false (>> (var d1) (bv 8 0x28) false)))) (~ (bv 8 0x0)) (bv 8 0x0))) (bv 8 0x28) false)) (set d0 (<< (cast 64 false (ite (! (ule (cast 8 false (>> (var d2) (bv 8 0x30) false)) (cast 8 false (>> (var d1) (bv 8 0x30) false)))) (~ (bv 8 0x0)) (bv 8 0x0))) (bv 8 0x30) false)) (set d0 (<< (cast 64 false (ite (! (ule (cast 8 false (>> (var d2) (bv 8 0x38) false)) (cast 8 false (>> (var d1) (bv 8 0x38) false)))) (~ (bv 8 0x0)) (bv 8 0x0))) (bv 8 0x38) false)))
d "vcgt.u16 d0, d2, d1" 010312f3 0x0 (seq empty (set d0 (<< (cast 64 false (ite (! (ule (cast 16 false (>> (var d2) (bv 8 0x0) false)) (cast 16 false (>> (var d1) (bv 8 0x0) false)))) (~ (bv 16 0x0)) (bv 16 0x0))) (bv 8 0x0) false)) (set d0 (<< (cast 64 false (ite (! (ule (cast 16 false (>> (var d2) (bv 8 0x10) false)) (cast 16 false (>> (var d1) (bv 8 0x10) false)))) (~ (bv 16 0x0)) (bv 16 0x0))) (bv 8 0x10) false)) (set d0 (<< (cast 64 false (ite (! (ule (cast 16 false (>> (var d2) (bv 8 0x20) false)) (cast 16 false (>> (var d1) (bv 8 0x20) false)))) (~ (bv 16 0x0)) (bv 16 0x0))) (bv 8 0x20) false)) (set d0 (<< (cast 64 false (ite (! (ule (cast 16 false (>> (var d2) (bv 8 0x30) false)) (cast 16 false (>> (var d1) (bv 8 0x30) false)))) (~ (bv 16 0x0)) (bv 16 0x0))) (bv 8 0x30) false)))
d "vcgt.u32 d0, d2, d1" 010322f3 0x0 (seq empty (set d0 (<< (cast 64 false (ite (! (ule (cast 32 false (>> (var d2) (bv 8 0x0) false)) (cast 32 false (>> (var d1) (bv 8 0x0) false)))) (~ (bv 32 0x0)) (bv 32 0x0))) (bv 8 0x0) false)) (set d0 (<< (cast 64 false (ite (! (ule (cast 32 false (>> (var d2) (bv 8 0x20) false)) (cast 32 false (>> (var d1) (bv 8 0x20) false)))) (~ (bv 32 0x0)) (bv 32 0x0))) (bv 8 0x20) false)))
d "vcgt.f32 d0, d2, d1" 010e22f3 0x0 (seq empty (set d0 (<< (cast 64 false (ite (<. (float 0 (cast 32 false (>> (var d1) (bv 8 0x0) false)) ) (float 0 (cast 32 false (>> (var d2) (bv 8 0x0) false)) )) (~ (bv 32 0x0)) (bv 32 0x0))) (bv 8 0x0) false)) (set d0 (<< (cast 64 false (ite (<. (float 0 (cast 32 false (>> (var d1) (bv 8 0x20) false)) ) (float 0 (cast 32 false (>> (var d2) (bv 8 0x20) false)) )) (~ (bv 32 0x0)) (bv 32 0x0))) (bv 8 0x20) false)))
d "vclt.s16 d0, d1, 0" 0102b5f3 0x0 (seq empty (set d0 (<< (cast 64 false (ite (&& (sle (cast 16 false (>> (var d1) (bv 8 0x0) false)) (bv 16 0x0)) (! (== (cast 16 false (>> (var d1) (bv 8 0x0) false)) (bv 16 0x0)))) (~ (bv 16 0x0)) (bv 16 0x0))) (bv 8 0x0) false)) (set d0 (<< (cast 64 false (ite (&& (sle (cast 16 false (>> (var d1) (bv 8 0x10) false)) (bv 16 0x0)) (! (== (cast 16 false (>> (var d1) (bv 8 0x10) false)) (bv 16 0x0)))) (~ (bv 16 0x0)) (bv 16 0x0))) (bv 8 0x10) false)) (set d0 (<< (cast 64 false (ite (&& (sle (cast 16 false (>> (var d1) (bv 8 0x20) false)) (bv 16 0x0)) (! (== (cast 16 false (>> (var d1) (bv 8 0x20) false)) (bv 16 0x0)))) (~ (bv 16 0x0)) (bv 16 0x0))) (bv 8 0x20) false)) (set d0 (<< (cast 64 false (ite (&& (sle (cast 16 false (>> (var d1) (bv 8 0x30) false)) (bv 16 0x0)) (! (== (cast 16 false (>> (var d1) (bv 8 0x30) false)) (bv 16 0x0)))) (~ (bv 16 0x0)) (bv 16 0x0))) (bv 8 0x30) false)))
d "vclt.f32 d0, d1, 0" 0106b9f3 0x0 (seq empty (set d0 (<< (cast 64 false (ite (<. (float 0 (cast 32 false (>> (var d1) (bv 8 0x0) false)) ) (float 0 (bv 32 0x0) )) (~ (bv 32 0x0)) (bv 32 0x0))) (bv 8 0x0) false)) (set d0 (<< (cast 64 false (ite (<. (float 0 (cast 32 false (>> (var d1) (bv 8 0x20) false)) ) (float 0 (bv 32 0x0) )) (~ (bv 32 0x0)) (bv 32 0x0))) (bv 8 0x20) false)))
d "vtst.8 d0, d1, d2" 120801f2 0x0 (seq empty (set d0 (<< (cast 64 false (ite (is_zero (& (cast 8 false (>> (var d1) (bv 8 0x0) false)) (cast 8 false (>> (var d2) (bv 8 0x0) false)))) (bv 8 0x0) (~ (bv 8 0x0)))) (bv 8 0x0) false)) (set d0 (<< (cast 64 false (ite (is_zero (& (cast 8 false (>> (var d1) (bv 8 0x8) false)) (cast 8 false (>> (var d2) (bv 8 0x8) false)))) (bv 8 0x0) (~ (bv 8 0x0)))) (bv 8 0x8) false)) (set d0 (<< (cast 64 false (ite (is_zero (& (cast 8 false (>> (var d1) (bv 8 0x10) false)) (cast 8 false (>> (var d2) (bv 8 0x10) false)))) (bv 8 0x0) (~ (bv 8 0x0)))) (bv 8 0x10) false)) (set d0 (<< (cast 64 false (ite (is_zero (& (cast 8 false (>> (var d1) (bv 8 0x18) false)) (cast 8 false (>> (var d2) (bv 8 0x18) false)))) (bv 8 0x0) (~ (bv 8 0x0)))) (bv 8 0x18) false)) (set d0 (<< (cast 64 false (ite (is_zero (& (cast 8 false (>> (var d1) (bv 8 0x20) false)) (cast 8 false (>> (var d2) (bv 8 0x20) false)))) (bv 8 0x0) (~ (bv 8 0x0)))) (bv 8 0x20) false)) (set d0 (<< (cast 64 false (ite (is_zero (& (cast 8 false (>> (var d1) (bv 8 0x28) false)) (cast 8 false (>> (var d2) (bv 8 0x28) false)))) (bv 8 0x0) (~ (bv 8 0x0)))) (bv 8 0x28) false)) (set d0 (<< (cast 64 false (ite (is_zero (& (cast 8 false (>> (var d1) (bv 8 0x30) false)) (cast 8 false (>> (var d2) (bv 8 0x30) false)))) (bv 8 0x0) (~ (bv 8 0x0)))) (bv 8 0x30) false)) (set d0 (<< (cast 64 false (ite (is_zero (& (cast 8 false (>> (var d1) (bv 8 0x38) false)) (cast 8 false (>> (var d2) (bv 8 0x38) false)))) (bv 8 0x0) (~ (bv 8 0x0)))) (bv 8 0x38) false)))
d "vtst.16 d0, d1, d2" 120811f2 0x0 (seq empty (set d0 (<< (cast 64 false (ite (is_zero (& (cast 16 false (>> (var d1) (bv 8 0x0) false)) (cast 16 false (>> (var d2) (bv 8 0x0) false)))) (bv 16 0x0) (~ (bv 16 0x0)))) (bv 8 0x0) false)) (set d0 (<< (cast 64 false (ite (is_zero (& (cast 16 false (>> (var d1) (bv 8 0x10) false)) (cast 16 false (>> (var d2) (bv 8 0x10) false)))) (bv 16 0x0) (~ (bv 16 0x0)))) (bv 8 0x10) false)) (set d0 (<< (cast 64 false (ite (is_zero (& (cast 16 false (>> (var d1) (bv 8 0x20) false)) (cast 16 false (>> (var d2) (bv 8 0x20) false)))) (bv 16 0x0) (~ (bv 16 0x0)))) (bv 8 0x20) false)) (set d0 (<< (cast 64 false (ite (is_zero (& (cast 16 false (>> (var d1) (bv 8 0x30) false)) (cast 16 false (>> (var d2) (bv 8 0x30) false)))) (bv 16 0x0) (~ (bv 16 0x0)))) (bv 8 0x30) false)))
d "vtst.32 d0, d1, d2" 120821f2 0x0 (seq empty (set d0 (<< (cast 64 false (ite (is_zero (& (cast 32 false (>> (var d1) (bv 8 0x0) false)) (cast 32 false (>> (var d2) (bv 8 0x0) false)))) (bv 32 0x0) (~ (bv 32 0x0)))) (bv 8 0x0) false)) (set d0 (<< (cast 64 false (ite (is_zero (& (cast 32 false (>> (var d1) (bv 8 0x20) false)) (cast 32 false (>> (var d2) (bv 8 0x20) false)))) (bv 32 0x0) (~ (bv 32 0x0)))) (bv 8 0x20) false)))
d "vdup.8 d0, r1" 101bc0ee 0x0 (seq empty (set d0 (<< (cast 64 false (cast 8 false (var r1))) (bv 8 0x0) false)) (set d0 (<< (cast 64 false (cast 8 false (var r1))) (bv 8 0x8) false)) (set d0 (<< (cast 64 false (cast 8 false (var r1))) (bv 8 0x10) false)) (set d0 (<< (cast 64 false (cast 8 false (var r1))) (bv 8 0x18) false)) (set d0 (<< (cast 64 false (cast 8 false (var r1))) (bv 8 0x20) false)) (set d0 (<< (cast 64 false (cast 8 false (var r1))) (bv 8 0x28) false)) (set d0 (<< (cast 64 false (cast 8 false (var r1))) (bv 8 0x30) false)) (set d0 (<< (cast 64 false (cast 8 false (var r1))) (bv 8 0x38) false)))
d "vdup.8 q0, r0" 100be0ee 0x0 (seq empty (set d0 (cast 64 false (<< (cast 128 false (cast 8 false (var r0))) (bv 8 0x0) false))) (set d1 (cast 64 false (>> (<< (cast 128 false (cast 8 false (var r0))) (bv 8 0x0) false) (bv 8 0x40) false))) (set d0 (cast 64 false (<< (cast 128 false (cast 8 false (var r0))) (bv 8 0x8) false))) (set d1 (cast 64 false (>> (<< (cast 128 false (cast 8 false (var r0))) (bv 8 0x8) false) (bv 8 0x40) false))) (set d0 (cast 64 false (<< (cast 128 false (cast 8 false (var r0))) (bv 8 0x10) false))) (set d1 (cast 64 false (>> (<< (cast 128 false (cast 8 false (var r0))) (bv 8 0x10) false) (bv 8 0x40) false))) (set d0 (cast 64 false (<< (cast 128 false (cast 8 false (var r0))) (bv 8 0x18) false))) (set d1 (cast 64 false (>> (<< (cast 128 false (cast 8 false (var r0))) (bv 8 0x18) false) (bv 8 0x40) false))) (set d0 (cast 64 false (<< (cast 128 false (cast 8 false (var r0))) (bv 8 0x20) false))) (set d1 (cast 64 false (>> (<< (cast 128 false (cast 8 false (var r0))) (bv 8 0x20) false) (bv 8 0x40) false))) (set d0 (cast 64 false (<< (cast 128 false (cast 8 false (var r0))) (bv 8 0x28) false))) (set d1 (cast 64 false (>> (<< (cast 128 false (cast 8 false (var r0))) (bv 8 0x28) false) (bv 8 0x40) false))) (set d0 (cast 64 false (<< (cast 128 false (cast 8 false (var r0))) (bv 8 0x30) false))) (set d1 (cast 64 false (>> (<< (cast 128 false (cast 8 false (var r0))) (bv 8 0x30) false) (bv 8 0x40) false))) (set d0 (cast 64 false (<< (cast 128 false (cast 8 false (var r0))) (bv 8 0x38) false))) (set d1 (cast 64 false (>> (<< (cast 128 false (cast 8 false (var r0))) (bv 8 0x38) false) (bv 8 0x40) false))) (set d0 (cast 64 false (<< (cast 128 false (cast 8 false (var r0))) (bv 8 0x40) false))) (set d1 (cast 64 false (>> (<< (cast 128 false (cast 8 false (var r0))) (bv 8 0x40) false) (bv 8 0x40) false))) (set d0 (cast 64 false (<< (cast 128 false (cast 8 false (var r0))) (bv 8 0x48) false))) (set d1 (cast 64 false (>> (<< (cast 128 false (cast 8 false (var r0))) (bv 8 0x48) false) (bv 8 0x40) false))) (set d0 (cast 64 false (<< (cast 128 false (cast 8 false (var r0))) (bv 8 0x50) false))) (set d1 (cast 64 false (>> (<< (cast 128 false (cast 8 false (var r0))) (bv 8 0x50) false) (bv 8 0x40) false))) (set d0 (cast 64 false (<< (cast 128 false (cast 8 false (var r0))) (bv 8 0x58) false))) (set d1 (cast 64 false (>> (<< (cast 128 false (cast 8 false (var r0))) (bv 8 0x58) false) (bv 8 0x40) false))) (set d0 (cast 64 false (<< (cast 128 false (cast 8 false (var r0))) (bv 8 0x60) false))) (set d1 (cast 64 false (>> (<< (cast 128 false (cast 8 false (var r0))) (bv 8 0x60) false) (bv 8 0x40) false))) (set d0 (cast 64 false (<< (cast 128 false (cast 8 false (var r0))) (bv 8 0x68) false))) (set d1 (cast 64 false (>> (<< (cast 128 false (cast 8 false (var r0))) (bv 8 0x68) false) (bv 8 0x40) false))) (set d0 (cast 64 false (<< (cast 128 false (cast 8 false (var r0))) (bv 8 0x70) false))) (set d1 (cast 64 false (>> (<< (cast 128 false (cast 8 false (var r0))) (bv 8 0x70) false) (bv 8 0x40) false))) (set d0 (cast 64 false (<< (cast 128 false (cast 8 false (var r0))) (bv 8 0x78) false))) (set d1 (cast 64 false (>> (<< (cast 128 false (cast 8 false (var r0))) (bv 8 0x78) false) (bv 8 0x40) false))))
d "vdup.8 d0, d2[3]" 020cb7f3 0x0 (seq empty (set d0 (<< (cast 64 false (cast 8 false (var d2))) (bv 8 0x0) false)) (set d0 (<< (cast 64 false (cast 8 false (var d2))) (bv 8 0x8) false)) (set d0 (<< (cast 64 false (cast 8 false (var d2))) (bv 8 0x10) false)) (set d0 (<< (cast 64 false (cast 8 false (var d2))) (bv 8 0x18) false)) (set d0 (<< (cast 64 false (cast 8 false (var d2))) (bv 8 0x20) false)) (set d0 (<< (cast 64 false (cast 8 false (var d2))) (bv 8 0x28) false)) (set d0 (<< (cast 64 false (cast 8 false (var d2))) (bv 8 0x30) false)) (set d0 (<< (cast 64 false (cast 8 false (var d2))) (bv 8 0x38) false)))
d "vdup.8 q0, d4[1]" 440cb3f3 0x0 (seq empty (set d0 (cast 64 false (<< (cast 128 false (cast 8 false (var d4))) (bv 8 0x0) false))) (set d1 (cast 64 false (>> (<< (cast 128 false (cast 8 false (var d4))) (bv 8 0x0) false) (bv 8 0x40) false))) (set d0 (cast 64 false (<< (cast 128 false (cast 8 false (var d4))) (bv 8 0x8) false))) (set d1 (cast 64 false (>> (<< (cast 128 false (cast 8 false (var d4))) (bv 8 0x8) false) (bv 8 0x40) false))) (set d0 (cast 64 false (<< (cast 128 false (cast 8 false (var d4))) (bv 8 0x10) false))) (set d1 (cast 64 false (>> (<< (cast 128 false (cast 8 false (var d4))) (bv 8 0x10) false) (bv 8 0x40) false))) (set d0 (cast 64 false (<< (cast 128 false (cast 8 false (var d4))) (bv 8 0x18) false))) (set d1 (cast 64 false (>> (<< (cast 128 false (cast 8 false (var d4))) (bv 8 0x18) false) (bv 8 0x40) false))) (set d0 (cast 64 false (<< (cast 128 false (cast 8 false (var d4))) (bv 8 0x20) false))) (set d1 (cast 64 false (>> (<< (cast 128 false (cast 8 false (var d4))) (bv 8 0x20) false) (bv 8 0x40) false))) (set d0 (cast 64 false (<< (cast 128 false (cast 8 false (var d4))) (bv 8 0x28) false))) (set d1 (cast 64 false (>> (<< (cast 128 false (cast 8 false (var d4))) (bv 8 0x28) false) (bv 8 0x40) false))) (set d0 (cast 64 false (<< (cast 128 false (cast 8 false (var d4))) (bv 8 0x30) false))) (set d1 (cast 64 false (>> (<< (cast 128 false (cast 8 false (var d4))) (bv 8 0x30) false) (bv 8 0x40) false))) (set d0 (cast 64 false (<< (cast 128 false (cast 8 false (var d4))) (bv 8 0x38) false))) (set d1 (cast 64 false (>> (<< (cast 128 false (cast 8 false (var d4))) (bv 8 0x38) false) (bv 8 0x40) false))) (set d0 (cast 64 false (<< (cast 128 false (cast 8 false (var d4))) (bv 8 0x40) false))) (set d1 (cast 64 false (>> (<< (cast 128 false (cast 8 false (var d4))) (bv 8 0x40) false) (bv 8 0x40) false))) (set d0 (cast 64 false (<< (cast 128 false (cast 8 false (var d4))) (bv 8 0x48) false))) (set d1 (cast 64 false (>> (<< (cast 128 false (cast 8 false (var d4))) (bv 8 0x48) false) (bv 8 0x40) false))) (set d0 (cast 64 false (<< (cast 128 false (cast 8 false (var d4))) (bv 8 0x50) false))) (set d1 (cast 64 false (>> (<< (cast 128 false (cast 8 false (var d4))) (bv 8 0x50) false) (bv 8 0x40) false))) (set d0 (cast 64 false (<< (cast 128 false (cast 8 false (var d4))) (bv 8 0x58) false))) (set d1 (cast 64 false (>> (<< (cast 128 false (cast 8 false (var d4))) (bv 8 0x58) false) (bv 8 0x40) false))) (set d0 (cast 64 false (<< (cast 128 false (cast 8 false (var d4))) (bv 8 0x60) false))) (set d1 (cast 64 false (>> (<< (cast 128 false (cast 8 false (var d4))) (bv 8 0x60) false) (bv 8 0x40) false))) (set d0 (cast 64 false (<< (cast 128 false (cast 8 false (var d4))) (bv 8 0x68) false))) (set d1 (cast 64 false (>> (<< (cast 128 false (cast 8 false (var d4))) (bv 8 0x68) false) (bv 8 0x40) false))) (set d0 (cast 64 false (<< (cast 128 false (cast 8 false (var d4))) (bv 8 0x70) false))) (set d1 (cast 64 false (>> (<< (cast 128 false (cast 8 false (var d4))) (bv 8 0x70) false) (bv 8 0x40) false))) (set d0 (cast 64 false (<< (cast 128 false (cast 8 false (var d4))) (bv 8 0x78) false))) (set d1 (cast 64 false (>> (<< (cast 128 false (cast 8 false (var d4))) (bv 8 0x78) false) (bv 8 0x40) false))))
d "vdup.16 d1, r2" 302b81ee 0x0 (seq empty (set d1 (<< (cast 64 false (cast 16 false (var r2))) (bv 8 0x0) false)) (set d1 (<< (cast 64 false (cast 16 false (var r2))) (bv 8 0x10) false)) (set d1 (<< (cast 64 false (cast 16 false (var r2))) (bv 8 0x20) false)) (set d1 (<< (cast 64 false (cast 16 false (var r2))) (bv 8 0x30) false)))
d "vdup.32 d5, r7" 107b85ee 0x0 (seq empty (set d5 (<< (cast 64 false (cast 32 false (var r7))) (bv 8 0x0) false)) (set d5 (<< (cast 64 false (cast 32 false (var r7))) (bv 8 0x20) false)))
d "vdup.32 d3, d2[1]" 023cbcf3 0x0 (seq empty (set d3 (<< (cast 64 false (cast 32 false (var d2))) (bv 8 0x0) false)) (set d3 (<< (cast 64 false (cast 32 false (var d2))) (bv 8 0x20) false)))
d "vadd.i8 d0, d1, d2" 020801f2 0x0 (seq empty (set d0 (<< (cast 64 false (+ (cast 8 false (>> (var d1) (bv 8 0x0) false)) (cast 8 false (>> (var d2) (bv 8 0x0) false)))) (bv 8 0x0) false)) (set d0 (<< (cast 64 false (+ (cast 8 false (>> (var d1) (bv 8 0x8) false)) (cast 8 false (>> (var d2) (bv 8 0x8) false)))) (bv 8 0x8) false)) (set d0 (<< (cast 64 false (+ (cast 8 false (>> (var d1) (bv 8 0x10) false)) (cast 8 false (>> (var d2) (bv 8 0x10) false)))) (bv 8 0x10) false)) (set d0 (<< (cast 64 false (+ (cast 8 false (>> (var d1) (bv 8 0x18) false)) (cast 8 false (>> (var d2) (bv 8 0x18) false)))) (bv 8 0x18) false)) (set d0 (<< (cast 64 false (+ (cast 8 false (>> (var d1) (bv 8 0x20) false)) (cast 8 false (>> (var d2) (bv 8 0x20) false)))) (bv 8 0x20) false)) (set d0 (<< (cast 64 false (+ (cast 8 false (>> (var d1) (bv 8 0x28) false)) (cast 8 false (>> (var d2) (bv 8 0x28) false)))) (bv 8 0x28) false)) (set d0 (<< (cast 64 false (+ (cast 8 false (>> (var d1) (bv 8 0x30) false)) (cast 8 false (>> (var d2) (bv 8 0x30) false)))) (bv 8 0x30) false)) (set d0 (<< (cast 64 false (+ (cast 8 false (>> (var d1) (bv 8 0x38) false)) (cast 8 false (>> (var d2) (bv 8 0x38) false)))) (bv 8 0x38) false)))
d "vadd.i16 d0, d1, d2" 020811f2 0x0 (seq empty (set d0 (<< (cast 64 false (+ (cast 16 false (>> (var d1) (bv 8 0x0) false)) (cast 16 false (>> (var d2) (bv 8 0x0) false)))) (bv 8 0x0) false)) (set d0 (<< (cast 64 false (+ (cast 16 false (>> (var d1) (bv 8 0x10) false)) (cast 16 false (>> (var d2) (bv 8 0x10) false)))) (bv 8 0x10) false)) (set d0 (<< (cast 64 false (+ (cast 16 false (>> (var d1) (bv 8 0x20) false)) (cast 16 false (>> (var d2) (bv 8 0x20) false)))) (bv 8 0x20) false)) (set d0 (<< (cast 64 false (+ (cast 16 false (>> (var d1) (bv 8 0x30) false)) (cast 16 false (>> (var d2) (bv 8 0x30) false)))) (bv 8 0x30) false)))
d "vadd.i32 d0, d1, d2" 020821f2 0x0 (seq empty (set d0 (<< (cast 64 false (+ (cast 32 false (>> (var d1) (bv 8 0x0) false)) (cast 32 false (>> (var d2) (bv 8 0x0) false)))) (bv 8 0x0) false)) (set d0 (<< (cast 64 false (+ (cast 32 false (>> (var d1) (bv 8 0x20) false)) (cast 32 false (>> (var d2) (bv 8 0x20) false)))) (bv 8 0x20) false)))
d "vadd.i64 d0, d1, d2" 020831f2 0x0 (seq empty (set d0 (<< (cast 64 false (+ (cast 64 false (>> (var d1) (bv 8 0x0) false)) (cast 64 false (>> (var d2) (bv 8 0x0) false)))) (bv 8 0x0) false)))
d "vadd.f32 d0, d1, d2" 020d01f2 0x0 (seq empty (set d0 (<< (cast 64 false (fbits (+. rne (float 0 (cast 32 false (>> (var d1) (bv 8 0x0) false)) ) (float 0 (cast 32 false (>> (var d2) (bv 8 0x0) false)) )))) (bv 8 0x0) false)) (set d0 (<< (cast 64 false (fbits (+. rne (float 0 (cast 32 false (>> (var d1) (bv 8 0x20) false)) ) (float 0 (cast 32 false (>> (var d2) (bv 8 0x20) false)) )))) (bv 8 0x20) false)))
d "vadd.f32 q0, q1, q2" 440d02f2 0x0 (seq empty (set d0 (cast 64 false (<< (cast 128 false (fbits (+. rne (float 0 (cast 32 false (>> (append (var d3) (var d2)) (bv 8 0x0) false)) ) (float 0 (cast 32 false (>> (append (var d5) (var d4)) (bv 8 0x0) false)) )))) (bv 8 0x0) false))) (set d1 (cast 64 false (>> (<< (cast 128 false (fbits (+. rne (float 0 (cast 32 false (>> (append (var d3) (var d2)) (bv 8 0x0) false)) ) (float 0 (cast 32 false (>> (append (var d5) (var d4)) (bv 8 0x0) false)) )))) (bv 8 0x0) false) (bv 8 0x40) false))) (set d0 (cast 64 false (<< (cast 128 false (fbits (+. rne (float 0 (cast 32 false (>> (append (var d3) (var d2)) (bv 8 0x20) false)) ) (float 0 (cast 32 false (>> (append (var d5) (var d4)) (bv 8 0x20) false)) )))) (bv 8 0x20) false))) (set d1 (cast 64 false (>> (<< (cast 128 false (fbits (+. rne (float 0 (cast 32 false (>> (append (var d3) (var d2)) (bv 8 0x20) false)) ) (float 0 (cast 32 false (>> (append (var d5) (var d4)) (bv 8 0x20) false)) )))) (bv 8 0x20) false) (bv 8 0x40) false))) (set d0 (cast 64 false (<< (cast 128 false (fbits (+. rne (float 0 (cast 32 false (>> (append (var d3) (var d2)) (bv 8 0x40) false)) ) (float 0 (cast 32 false (>> (append (var d5) (var d4)) (bv 8 0x40) false)) )))) (bv 8 0x40) false))) (set d1 (cast 64 false (>> (<< (cast 128 false (fbits (+. rne (float 0 (cast 32 false (>> (append (var d3) (var d2)) (bv 8 0x40) false)) ) (float 0 (cast 32 false (>> (append (var d5) (var d4)) (bv 8 0x40) false)) )))) (bv 8 0x40) false) (bv 8 0x40) false))) (set d0 (cast 64 false (<< (cast 128 false (fbits (+. rne (float 0 (cast 32 false (>> (append (var d3) (var d2)) (bv 8 0x60) false)) ) (float 0 (cast 32 false (>> (append (var d5) (var d4)) (bv 8 0x60) false)) )))) (bv 8 0x60) false))) (set d1 (cast 64 false (>> (<< (cast 128 false (fbits (+. rne (float 0 (cast 32 false (>> (append (var d3) (var d2)) (bv 8 0x60) false)) ) (float 0 (cast 32 false (>> (append (var d5) (var d4)) (bv 8 0x60) false)) )))) (bv 8 0x60) false) (bv 8 0x40) false))))
d "vadd.f32 s0, s1, s3" a10a30ee 0x0 (set d0 (| (& (var d0) (bv 64 0xffffffff00000000)) (cast 64 false (fbits (+. rne (float 0 (cast 32 false (>> (var d0) (bv 7 0x20) false)) ) (float 0 (cast 32 false (>> (var d1) (bv 7 0x20) false)) ))))))
d "vadd.f64 d0, d1, d2" 020b31ee 0x0 (set d0 (fbits (+. rne (float 1 (var d1) ) (float 1 (var d2) ))))
d "vsub.i8 d0, d1, d2" 020801f3 0x0 (seq empty (set d0 (<< (cast 64 false (- (cast 8 false (>> (var d1) (bv 8 0x0) false)) (cast 8 false (>> (var d2) (bv 8 0x0) false)))) (bv 8 0x0) false)) (set d0 (<< (cast 64 false (- (cast 8 false (>> (var d1) (bv 8 0x8) false)) (cast 8 false (>> (var d2) (bv 8 0x8) false)))) (bv 8 0x8) false)) (set d0 (<< (cast 64 false (- (cast 8 false (>> (var d1) (bv 8 0x10) false)) (cast 8 false (>> (var d2) (bv 8 0x10) false)))) (bv 8 0x10) false)) (set d0 (<< (cast 64 false (- (cast 8 false (>> (var d1) (bv 8 0x18) false)) (cast 8 false (>> (var d2) (bv 8 0x18) false)))) (bv 8 0x18) false)) (set d0 (<< (cast 64 false (- (cast 8 false (>> (var d1) (bv 8 0x20) false)) (cast 8 false (>> (var d2) (bv 8 0x20) false)))) (bv 8 0x20) false)) (set d0 (<< (cast 64 false (- (cast 8 false (>> (var d1) (bv 8 0x28) false)) (cast 8 false (>> (var d2) (bv 8 0x28) false)))) (bv 8 0x28) false)) (set d0 (<< (cast 64 false (- (cast 8 false (>> (var d1) (bv 8 0x30) false)) (cast 8 false (>> (var d2) (bv 8 0x30) false)))) (bv 8 0x30) false)) (set d0 (<< (cast 64 false (- (cast 8 false (>> (var d1) (bv 8 0x38) false)) (cast 8 false (>> (var d2) (bv 8 0x38) false)))) (bv 8 0x38) false)))
d "vsub.i16 d0, d1, d2" 020811f3 0x0 (seq empty (set d0 (<< (cast 64 false (- (cast 16 false (>> (var d1) (bv 8 0x0) false)) (cast 16 false (>> (var d2) (bv 8 0x0) false)))) (bv 8 0x0) false)) (set d0 (<< (cast 64 false (- (cast 16 false (>> (var d1) (bv 8 0x10) false)) (cast 16 false (>> (var d2) (bv 8 0x10) false)))) (bv 8 0x10) false)) (set d0 (<< (cast 64 false (- (cast 16 false (>> (var d1) (bv 8 0x20) false)) (cast 16 false (>> (var d2) (bv 8 0x20) false)))) (bv 8 0x20) false)) (set d0 (<< (cast 64 false (- (cast 16 false (>> (var d1) (bv 8 0x30) false)) (cast 16 false (>> (var d2) (bv 8 0x30) false)))) (bv 8 0x30) false)))
d "vsub.i32 d0, d1, d2" 020821f3 0x0 (seq empty (set d0 (<< (cast 64 false (- (cast 32 false (>> (var d1) (bv 8 0x0) false)) (cast 32 false (>> (var d2) (bv 8 0x0) false)))) (bv 8 0x0) false)) (set d0 (<< (cast 64 false (- (cast 32 false (>> (var d1) (bv 8 0x20) false)) (cast 32 false (>> (var d2) (bv 8 0x20) false)))) (bv 8 0x20) false)))
d "vsub.i64 d0, d1, d2" 020831f3 0x0 (seq empty (set d0 (<< (cast 64 false (- (cast 64 false (>> (var d1) (bv 8 0x0) false)) (cast 64 false (>> (var d2) (bv 8 0x0) false)))) (bv 8 0x0) false)))
d "vsub.f32 d0, d1, d2" 020d21f2 0x0 (seq empty (set d0 (<< (cast 64 false (fbits (-. rne (float 0 (cast 32 false (>> (var d1) (bv 8 0x0) false)) ) (float 0 (cast 32 false (>> (var d2) (bv 8 0x0) false)) )))) (bv 8 0x0) false)) (set d0 (<< (cast 64 false (fbits (-. rne (float 0 (cast 32 false (>> (var d1) (bv 8 0x20) false)) ) (float 0 (cast 32 false (>> (var d2) (bv 8 0x20) false)) )))) (bv 8 0x20) false)))
d "vsub.f32 q0, q1, q2" 440d22f2 0x0 (seq empty (set d0 (cast 64 false (<< (cast 128 false (fbits (-. rne (float 0 (cast 32 false (>> (append (var d3) (var d2)) (bv 8 0x0) false)) ) (float 0 (cast 32 false (>> (append (var d5) (var d4)) (bv 8 0x0) false)) )))) (bv 8 0x0) false))) (set d1 (cast 64 false (>> (<< (cast 128 false (fbits (-. rne (float 0 (cast 32 false (>> (append (var d3) (var d2)) (bv 8 0x0) false)) ) (float 0 (cast 32 false (>> (append (var d5) (var d4)) (bv 8 0x0) false)) )))) (bv 8 0x0) false) (bv 8 0x40) false))) (set d0 (cast 64 false (<< (cast 128 false (fbits (-. rne (float 0 (cast 32 false (>> (append (var d3) (var d2)) (bv 8 0x20) false)) ) (float 0 (cast 32 false (>> (append (var d5) (var d4)) (bv 8 0x20) false)) )))) (bv 8 0x20) false))) (set d1 (cast 64 false (>> (<< (cast 128 false (fbits (-. rne (float 0 (cast 32 false (>> (append (var d3) (var d2)) (bv 8 0x20) false)) ) (float 0 (cast 32 false (>> (append (var d5) (var d4)) (bv 8 0x20) false)) )))) (bv 8 0x20) false) (bv 8 0x40) false))) (set d0 (cast 64 false (<< (cast 128 false (fbits (-. rne (float 0 (cast 32 false (>> (append (var d3) (var d2)) (bv 8 0x40) false)) ) (float 0 (cast 32 false (>> (append (var d5) (var d4)) (bv 8 0x40) false)) )))) (bv 8 0x40) false))) (set d1 (cast 64 false (>> (<< (cast 128 false (fbits (-. rne (float 0 (cast 32 false (>> (append (var d3) (var d2)) (bv 8 0x40) false)) ) (float 0 (cast 32 false (>> (append (var d5) (var d4)) (bv 8 0x40) false)) )))) (bv 8 0x40) false) (bv 8 0x40) false))) (set d0 (cast 64 false (<< (cast 128 false (fbits (-. rne (float 0 (cast 32 false (>> (append (var d3) (var d2)) (bv 8 0x60) false)) ) (float 0 (cast 32 false (>> (append (var d5) (var d4)) (bv 8 0x60) false)) )))) (bv 8 0x60) false))) (set d1 (cast 64 false (>> (<< (cast 128 false (fbits (-. rne (float 0 (cast 32 false (>> (append (var d3) (var d2)) (bv 8 0x60) false)) ) (float 0 (cast 32 false (>> (append (var d5) (var d4)) (bv 8 0x60) false)) )))) (bv 8 0x60) false) (bv 8 0x40) false))))
d "vsub.f32 s0, s1, s2" c10a30ee 0x0 (set d0 (| (& (var d0) (bv 64 0xffffffff00000000)) (cast 64 false (fbits (-. rne (float 0 (cast 32 false (>> (var d0) (bv 7 0x20) false)) ) (float 0 (cast 32 false (var d1)) ))))))
d "vsub.f64 d0, d1, d2" 420b31ee 0x0 (set d0 (fbits (-. rne (float 1 (var d1) ) (float 1 (var d2) ))))
d "vmul.f32 s4, s12, s13" 262a26ee 0x0 (set d2 (| (& (var d2) (bv 64 0xffffffff00000000)) (cast 64 false (fbits (*. rne (float 0 (cast 32 false (var d6)) ) (float 0 (cast 32 false (>> (var d6) (bv 7 0x20) false)) ))))))
d "vldr s0, [fp, -0x14]" 050a1bed 0x0 (set d0 (| (& (var d0) (bv 64 0xffffffff00000000)) (cast 64 false (loadw 0 32 (- (var r11) (bv 32 0x14))))))
d "vstr s1, [fp, 0x30]" 0c0acbed 0x0 (storew 0 (+ (var r11) (bv 32 0x30)) (cast 32 false (>> (var d0) (bv 7 0x20) false)))
d "vldr s0, [sp, 8]" 020a9ded 0x0 (set d0 (| (& (var d0) (bv 64 0xffffffff00000000)) (cast 64 false (loadw 0 32 (+ (var sp) (bv 32 0x8))))))
d "vldr d0, [r2]" 000b92ed 0x0 (set d0 (loadw 0 64 (var r2)))
d "vabs.f32 s0, s15" e70ab0ee 0x0 (set d0 (| (& (var d0) (bv 64 0xffffffff00000000)) (cast 64 false (fbits (fpos (float 0 (cast 32 false (>> (var d7) (bv 7 0x20) false)) ))))))
d "vabs.f64 d1, d8" c81bb0ee 0x0 (set d1 (fbits (fpos (float 1 (var d8) ))))
d "vswp d0, d1" 0100b2f3 0x0 (seq (set d0 (var d1)) (set d1 (var d0)))
d "vswp q2, q3" 4640b2f3 0x0 (seq (set d4 (cast 64 false (append (var d7) (var d6)))) (set d5 (cast 64 false (>> (append (var d7) (var d6)) (bv 8 0x40) false))) (set d6 (cast 64 false (append (var d5) (var d4)))) (set d7 (cast 64 false (>> (append (var d5) (var d4)) (bv 8 0x40) false))))
d "vzip.8 d0, d1" 8101b2f3 0x0 (seq (set d0 (cast 64 false (| (| (| (| (| (| (| (| (bv 128 0x0) (<< (| (<< (cast 128 false (cast 8 false (>> (var d1) (bv 8 0x0) false))) (bv 8 0x8) false) (cast 128 false (cast 8 false (>> (var d0) (bv 8 0x0) false)))) (bv 32 0x10) false)) (<< (| (<< (cast 128 false (cast 8 false (>> (var d1) (bv 8 0x8) false))) (bv 8 0x8) false) (cast 128 false (cast 8 false (>> (var d0) (bv 8 0x8) false)))) (bv 32 0x10) false)) (<< (| (<< (cast 128 false (cast 8 false (>> (var d1) (bv 8 0x10) false))) (bv 8 0x8) false) (cast 128 false (cast 8 false (>> (var d0) (bv 8 0x10) false)))) (bv 32 0x10) false)) (<< (| (<< (cast 128 false (cast 8 false (>> (var d1) (bv 8 0x18) false))) (bv 8 0x8) false) (cast 128 false (cast 8 false (>> (var d0) (bv 8 0x18) false)))) (bv 32 0x10) false)) (<< (| (<< (cast 128 false (cast 8 false (>> (var d1) (bv 8 0x20) false))) (bv 8 0x8) false) (cast 128 false (cast 8 false (>> (var d0) (bv 8 0x20) false)))) (bv 32 0x10) false)) (<< (| (<< (cast 128 false (cast 8 false (>> (var d1) (bv 8 0x28) false))) (bv 8 0x8) false) (cast 128 false (cast 8 false (>> (var d0) (bv 8 0x28) false)))) (bv 32 0x10) false)) (<< (| (<< (cast 128 false (cast 8 false (>> (var d1) (bv 8 0x30) false))) (bv 8 0x8) false) (cast 128 false (cast 8 false (>> (var d0) (bv 8 0x30) false)))) (bv 32 0x10) false)) (<< (| (<< (cast 128 false (cast 8 false (>> (var d1) (bv 8 0x38) false))) (bv 8 0x8) false) (cast 128 false (cast 8 false (>> (var d0) (bv 8 0x38) false)))) (bv 32 0x10) false)))) (set d1 (cast 64 false (>> (| (| (| (| (| (| (| (| (bv 128 0x0) (<< (| (<< (cast 128 false (cast 8 false (>> (var d1) (bv 8 0x0) false))) (bv 8 0x8) false) (cast 128 false (cast 8 false (>> (var d0) (bv 8 0x0) false)))) (bv 32 0x10) false)) (<< (| (<< (cast 128 false (cast 8 false (>> (var d1) (bv 8 0x8) false))) (bv 8 0x8) false) (cast 128 false (cast 8 false (>> (var d0) (bv 8 0x8) false)))) (bv 32 0x10) false)) (<< (| (<< (cast 128 false (cast 8 false (>> (var d1) (bv 8 0x10) false))) (bv 8 0x8) false) (cast 128 false (cast 8 false (>> (var d0) (bv 8 0x10) false)))) (bv 32 0x10) false)) (<< (| (<< (cast 128 false (cast 8 false (>> (var d1) (bv 8 0x18) false))) (bv 8 0x8) false) (cast 128 false (cast 8 false (>> (var d0) (bv 8 0x18) false)))) (bv 32 0x10) false)) (<< (| (<< (cast 128 false (cast 8 false (>> (var d1) (bv 8 0x20) false))) (bv 8 0x8) false) (cast 128 false (cast 8 false (>> (var d0) (bv 8 0x20) false)))) (bv 32 0x10) false)) (<< (| (<< (cast 128 false (cast 8 false (>> (var d1) (bv 8 0x28) false))) (bv 8 0x8) false) (cast 128 false (cast 8 false (>> (var d0) (bv 8 0x28) false)))) (bv 32 0x10) false)) (<< (| (<< (cast 128 false (cast 8 false (>> (var d1) (bv 8 0x30) false))) (bv 8 0x8) false) (cast 128 false (cast 8 false (>> (var d0) (bv 8 0x30) false)))) (bv 32 0x10) false)) (<< (| (<< (cast 128 false (cast 8 false (>> (var d1) (bv 8 0x38) false))) (bv 8 0x8) false) (cast 128 false (cast 8 false (>> (var d0) (bv 8 0x38) false)))) (bv 32 0x10) false)) (bv 8 0x8) false))))
d "vzip.8 q0, q1" c201b2f3 0x0 (seq (set d0 (cast 64 false (cast 128 false (| (| (| (| (| (| (| (| (| (| (| (| (| (| (| (| (bv 256 0x0) (<< (| (<< (cast 256 false (cast 8 false (>> (append (var d3) (var d2)) (bv 8 0x0) false))) (bv 8 0x8) false) (cast 256 false (cast 8 false (>> (append (var d1) (var d0)) (bv 8 0x0) false)))) (bv 32 0x10) false)) (<< (| (<< (cast 256 false (cast 8 false (>> (append (var d3) (var d2)) (bv 8 0x8) false))) (bv 8 0x8) false) (cast 256 false (cast 8 false (>> (append (var d1) (var d0)) (bv 8 0x8) false)))) (bv 32 0x10) false)) (<< (| (<< (cast 256 false (cast 8 false (>> (append (var d3) (var d2)) (bv 8 0x10) false))) (bv 8 0x8) false) (cast 256 false (cast 8 false (>> (append (var d1) (var d0)) (bv 8 0x10) false)))) (bv 32 0x10) false)) (<< (| (<< (cast 256 false (cast 8 false (>> (append (var d3) (var d2)) (bv 8 0x18) false))) (bv 8 0x8) false) (cast 256 false (cast 8 false (>> (append (var d1) (var d0)) (bv 8 0x18) false)))) (bv 32 0x10) false)) (<< (| (<< (cast 256 false (cast 8 false (>> (append (var d3) (var d2)) (bv 8 0x20) false))) (bv 8 0x8) false) (cast 256 false (cast 8 false (>> (append (var d1) (var d0)) (bv 8 0x20) false)))) (bv 32 0x10) false)) (<< (| (<< (cast 256 false (cast 8 false (>> (append (var d3) (var d2)) (bv 8 0x28) false))) (bv 8 0x8) false) (cast 256 false (cast 8 false (>> (append (var d1) (var d0)) (bv 8 0x28) false)))) (bv 32 0x10) false)) (<< (| (<< (cast 256 false (cast 8 false (>> (append (var d3) (var d2)) (bv 8 0x30) false))) (bv 8 0x8) false) (cast 256 false (cast 8 false (>> (append (var d1) (var d0)) (bv 8 0x30) false)))) (bv 32 0x10) false)) (<< (| (<< (cast 256 false (cast 8 false (>> (append (var d3) (var d2)) (bv 8 0x38) false))) (bv 8 0x8) false) (cast 256 false (cast 8 false (>> (append (var d1) (var d0)) (bv 8 0x38) false)))) (bv 32 0x10) false)) (<< (| (<< (cast 256 false (cast 8 false (>> (append (var d3) (var d2)) (bv 8 0x40) false))) (bv 8 0x8) false) (cast 256 false (cast 8 false (>> (append (var d1) (var d0)) (bv 8 0x40) false)))) (bv 32 0x10) false)) (<< (| (<< (cast 256 false (cast 8 false (>> (append (var d3) (var d2)) (bv 8 0x48) false))) (bv 8 0x8) false) (cast 256 false (cast 8 false (>> (append (var d1) (var d0)) (bv 8 0x48) false)))) (bv 32 0x10) false)) (<< (| (<< (cast 256 false (cast 8 false (>> (append (var d3) (var d2)) (bv 8 0x50) false))) (bv 8 0x8) false) (cast 256 false (cast 8 false (>> (append (var d1) (var d0)) (bv 8 0x50) false)))) (bv 32 0x10) false)) (<< (| (<< (cast 256 false (cast 8 false (>> (append (var d3) (var d2)) (bv 8 0x58) false))) (bv 8 0x8) false) (cast 256 false (cast 8 false (>> (append (var d1) (var d0)) (bv 8 0x58) false)))) (bv 32 0x10) false)) (<< (| (<< (cast 256 false (cast 8 false (>> (append (var d3) (var d2)) (bv 8 0x60) false))) (bv 8 0x8) false) (cast 256 false (cast 8 false (>> (append (var d1) (var d0)) (bv 8 0x60) false)))) (bv 32 0x10) false)) (<< (| (<< (cast 256 false (cast 8 false (>> (append (var d3) (var d2)) (bv 8 0x68) false))) (bv 8 0x8) false) (cast 256 false (cast 8 false (>> (append (var d1) (var d0)) (bv 8 0x68) false)))) (bv 32 0x10) false)) (<< (| (<< (cast 256 false (cast 8 false (>> (append (var d3) (var d2)) (bv 8 0x70) false))) (bv 8 0x8) false) (cast 256 false (cast 8 false (>> (append (var d1) (var d0)) (bv 8 0x70) false)))) (bv 32 0x10) false)) (<< (| (<< (cast 256 false (cast 8 false (>> (append (var d3) (var d2)) (bv 8 0x78) false))) (bv 8 0x8) false) (cast 256 false (cast 8 false (>> (append (var d1) (var d0)) (bv 8 0x78) false)))) (bv 32 0x10) false))))) (set d1 (cast 64 false (>> (cast 128 false (| (| (| (| (| (| (| (| (| (| (| (| (| (| (| (| (bv 256 0x0) (<< (| (<< (cast 256 false (cast 8 false (>> (append (var d3) (var d2)) (bv 8 0x0) false))) (bv 8 0x8) false) (cast 256 false (cast 8 false (>> (append (var d1) (var d0)) (bv 8 0x0) false)))) (bv 32 0x10) false)) (<< (| (<< (cast 256 false (cast 8 false (>> (append (var d3) (var d2)) (bv 8 0x8) false))) (bv 8 0x8) false) (cast 256 false (cast 8 false (>> (append (var d1) (var d0)) (bv 8 0x8) false)))) (bv 32 0x10) false)) (<< (| (<< (cast 256 false (cast 8 false (>> (append (var d3) (var d2)) (bv 8 0x10) false))) (bv 8 0x8) false) (cast 256 false (cast 8 false (>> (append (var d1) (var d0)) (bv 8 0x10) false)))) (bv 32 0x10) false)) (<< (| (<< (cast 256 false (cast 8 false (>> (append (var d3) (var d2)) (bv 8 0x18) false))) (bv 8 0x8) false) (cast 256 false (cast 8 false (>> (append (var d1) (var d0)) (bv 8 0x18) false)))) (bv 32 0x10) false)) (<< (| (<< (cast 256 false (cast 8 false (>> (append (var d3) (var d2)) (bv 8 0x20) false))) (bv 8 0x8) false) (cast 256 false (cast 8 false (>> (append (var d1) (var d0)) (bv 8 0x20) false)))) (bv 32 0x10) false)) (<< (| (<< (cast 256 false (cast 8 false (>> (append (var d3) (var d2)) (bv 8 0x28) false))) (bv 8 0x8) false) (cast 256 false (cast 8 false (>> (append (var d1) (var d0)) (bv 8 0x28) false)))) (bv 32 0x10) false)) (<< (| (<< (cast 256 false (cast 8 false (>> (append (var d3) (var d2)) (bv 8 0x30) false))) (bv 8 0x8) false) (cast 256 false (cast 8 false (>> (append (var d1) (var d0)) (bv 8 0x30) false)))) (bv 32 0x10) false)) (<< (| (<< (cast 256 false (cast 8 false (>> (append (var d3) (var d2)) (bv 8 0x38) false))) (bv 8 0x8) false) (cast 256 false (cast 8 false (>> (append (var d1) (var d0)) (bv 8 0x38) false)))) (bv 32 0x10) false)) (<< (| (<< (cast 256 false (cast 8 false (>> (append (var d3) (var d2)) (bv 8 0x40) false))) (bv 8 0x8) false) (cast 256 false (cast 8 false (>> (append (var d1) (var d0)) (bv 8 0x40) false)))) (bv 32 0x10) false)) (<< (| (<< (cast 256 false (cast 8 false (>> (append (var d3) (var d2)) (bv 8 0x48) false))) (bv 8 0x8) false) (cast 256 false (cast 8 false (>> (append (var d1) (var d0)) (bv 8 0x48) false)))) (bv 32 0x10) false)) (<< (| (<< (cast 256 false (cast 8 false (>> (append (var d3) (var d2)) (bv 8 0x50) false))) (bv 8 0x8) false) (cast 256 false (cast 8 false (>> (append (var d1) (var d0)) (bv 8 0x50) false)))) (bv 32 0x10) false)) (<< (| (<< (cast 256 false (cast 8 false (>> (append (var d3) (var d2)) (bv 8 0x58) false))) (bv 8 0x8) false) (cast 256 false (cast 8 false (>> (append (var d1) (var d0)) (bv 8 0x58) false)))) (bv 32 0x10) false)) (<< (| (<< (cast 256 false (cast 8 false (>> (append (var d3) (var d2)) (bv 8 0x60) false))) (bv 8 0x8) false) (cast 256 false (cast 8 false (>> (append (var d1) (var d0)) (bv 8 0x60) false)))) (bv 32 0x10) false)) (<< (| (<< (cast 256 false (cast 8 false (>> (append (var d3) (var d2)) (bv 8 0x68) false))) (bv 8 0x8) false) (cast 256 false (cast 8 false (>> (append (var d1) (var d0)) (bv 8 0x68) false)))) (bv 32 0x10) false)) (<< (| (<< (cast 256 false (cast 8 false (>> (append (var d3) (var d2)) (bv 8 0x70) false))) (bv 8 0x8) false) (cast 256 false (cast 8 false (>> (append (var d1) (var d0)) (bv 8 0x70) false)))) (bv 32 0x10) false)) (<< (| (<< (cast 256 false (cast 8 false (>> (append (var d3) (var d2)) (bv 8 0x78) false))) (bv 8 0x8) false) (cast 256 false (cast 8 false (>> (append (var d1) (var d0)) (bv 8 0x78) false)))) (bv 32 0x10) false))) (bv 8 0x40) false))) (set d2 (cast 64 false (cast 128 false (>> (| (| (| (| (| (| (| (| (| (| (| (| (| (| (| (| (bv 256 0x0) (<< (| (<< (cast 256 false (cast 8 false (>> (append (var d3) (var d2)) (bv 8 0x0) false))) (bv 8 0x8) false) (cast 256 false (cast 8 false (>> (append (var d1) (var d0)) (bv 8 0x0) false)))) (bv 32 0x10) false)) (<< (| (<< (cast 256 false (cast 8 false (>> (append (var d3) (var d2)) (bv 8 0x8) false))) (bv 8 0x8) false) (cast 256 false (cast 8 false (>> (append (var d1) (var d0)) (bv 8 0x8) false)))) (bv 32 0x10) false)) (<< (| (<< (cast 256 false (cast 8 false (>> (append (var d3) (var d2)) (bv 8 0x10) false))) (bv 8 0x8) false) (cast 256 false (cast 8 false (>> (append (var d1) (var d0)) (bv 8 0x10) false)))) (bv 32 0x10) false)) (<< (| (<< (cast 256 false (cast 8 false (>> (append (var d3) (var d2)) (bv 8 0x18) false))) (bv 8 0x8) false) (cast 256 false (cast 8 false (>> (append (var d1) (var d0)) (bv 8 0x18) false)))) (bv 32 0x10) false)) (<< (| (<< (cast 256 false (cast 8 false (>> (append (var d3) (var d2)) (bv 8 0x20) false))) (bv 8 0x8) false) (cast 256 false (cast 8 false (>> (append (var d1) (var d0)) (bv 8 0x20) false)))) (bv 32 0x10) false)) (<< (| (<< (cast 256 false (cast 8 false (>> (append (var d3) (var d2)) (bv 8 0x28) false))) (bv 8 0x8) false) (cast 256 false (cast 8 false (>> (append (var d1) (var d0)) (bv 8 0x28) false)))) (bv 32 0x10) false)) (<< (| (<< (cast 256 false (cast 8 false (>> (append (var d3) (var d2)) (bv 8 0x30) false))) (bv 8 0x8) false) (cast 256 false (cast 8 false (>> (append (var d1) (var d0)) (bv 8 0x30) false)))) (bv 32 0x10) false)) (<< (| (<< (cast 256 false (cast 8 false (>> (append (var d3) (var d2)) (bv 8 0x38) false))) (bv 8 0x8) false) (cast 256 false (cast 8 false (>> (append (var d1) (var d0)) (bv 8 0x38) false)))) (bv 32 0x10) false)) (<< (| (<< (cast 256 false (cast 8 false (>> (append (var d3) (var d2)) (bv 8 0x40) false))) (bv 8 0x8) false) (cast 256 false (cast 8 false (>> (append (var d1) (var d0)) (bv 8 0x40) false)))) (bv 32 0x10) false)) (<< (| (<< (cast 256 false (cast 8 false (>> (append (var d3) (var d2)) (bv 8 0x48) false))) (bv 8 0x8) false) (cast 256 false (cast 8 false (>> (append (var d1) (var d0)) (bv 8 0x48) false)))) (bv 32 0x10) false)) (<< (| (<< (cast 256 false (cast 8 false (>> (append (var d3) (var d2)) (bv 8 0x50) false))) (bv 8 0x8) false) (cast 256 false (cast 8 false (>> (append (var d1) (var d0)) (bv 8 0x50) false)))) (bv 32 0x10) false)) (<< (| (<< (cast 256 false (cast 8 false (>> (append (var d3) (var d2)) (bv 8 0x58) false))) (bv 8 0x8) false) (cast 256 false (cast 8 false (>> (append (var d1) (var d0)) (bv 8 0x58) false)))) (bv 32 0x10) false)) (<< (| (<< (cast 256 false (cast 8 false (>> (append (var d3) (var d2)) (bv 8 0x60) false))) (bv 8 0x8) false) (cast 256 false (cast 8 false (>> (append (var d1) (var d0)) (bv 8 0x60) false)))) (bv 32 0x10) false)) (<< (| (<< (cast 256 false (cast 8 false (>> (append (var d3) (var d2)) (bv 8 0x68) false))) (bv 8 0x8) false) (cast 256 false (cast 8 false (>> (append (var d1) (var d0)) (bv 8 0x68) false)))) (bv 32 0x10) false)) (<< (| (<< (cast 256 false (cast 8 false (>> (append (var d3) (var d2)) (bv 8 0x70) false))) (bv 8 0x8) false) (cast 256 false (cast 8 false (>> (append (var d1) (var d0)) (bv 8 0x70) false)))) (bv 32 0x10) false)) (<< (| (<< (cast 256 false (cast 8 false (>> (append (var d3) (var d2)) (bv 8 0x78) false))) (bv 8 0x8) false) (cast 256 false (cast 8 false (>> (append (var d1) (var d0)) (bv 8 0x78) false)))) (bv 32 0x10) false)) (bv 8 0x8) false)))) (set d3 (cast 64 false (>> (cast 128 false (>> (| (| (| (| (| (| (| (| (| (| (| (| (| (| (| (| (bv 256 0x0) (<< (| (<< (cast 256 false (cast 8 false (>> (append (var d3) (var d2)) (bv 8 0x0) false))) (bv 8 0x8) false) (cast 256 false (cast 8 false (>> (append (var d1) (var d0)) (bv 8 0x0) false)))) (bv 32 0x10) false)) (<< (| (<< (cast 256 false (cast 8 false (>> (append (var d3) (var d2)) (bv 8 0x8) false))) (bv 8 0x8) false) (cast 256 false (cast 8 false (>> (append (var d1) (var d0)) (bv 8 0x8) false)))) (bv 32 0x10) false)) (<< (| (<< (cast 256 false (cast 8 false (>> (append (var d3) (var d2)) (bv 8 0x10) false))) (bv 8 0x8) false) (cast 256 false (cast 8 false (>> (append (var d1) (var d0)) (bv 8 0x10) false)))) (bv 32 0x10) false)) (<< (| (<< (cast 256 false (cast 8 false (>> (append (var d3) (var d2)) (bv 8 0x18) false))) (bv 8 0x8) false) (cast 256 false (cast 8 false (>> (append (var d1) (var d0)) (bv 8 0x18) false)))) (bv 32 0x10) false)) (<< (| (<< (cast 256 false (cast 8 false (>> (append (var d3) (var d2)) (bv 8 0x20) false))) (bv 8 0x8) false) (cast 256 false (cast 8 false (>> (append (var d1) (var d0)) (bv 8 0x20) false)))) (bv 32 0x10) false)) (<< (| (<< (cast 256 false (cast 8 false (>> (append (var d3) (var d2)) (bv 8 0x28) false))) (bv 8 0x8) false) (cast 256 false (cast 8 false (>> (append (var d1) (var d0)) (bv 8 0x28) false)))) (bv 32 0x10) false)) (<< (| (<< (cast 256 false (cast 8 false (>> (append (var d3) (var d2)) (bv 8 0x30) false))) (bv 8 0x8) false) (cast 256 false (cast 8 false (>> (append (var d1) (var d0)) (bv 8 0x30) false)))) (bv 32 0x10) false)) (<< (| (<< (cast 256 false (cast 8 false (>> (append (var d3) (var d2)) (bv 8 0x38) false))) (bv 8 0x8) false) (cast 256 false (cast 8 false (>> (append (var d1) (var d0)) (bv 8 0x38) false)))) (bv 32 0x10) false)) (<< (| (<< (cast 256 false (cast 8 false (>> (append (var d3) (var d2)) (bv 8 0x40) false))) (bv 8 0x8) false) (cast 256 false (cast 8 false (>> (append (var d1) (var d0)) (bv 8 0x40) false)))) (bv 32 0x10) false)) (<< (| (<< (cast 256 false (cast 8 false (>> (append (var d3) (var d2)) (bv 8 0x48) false))) (bv 8 0x8) false) (cast 256 false (cast 8 false (>> (append (var d1) (var d0)) (bv 8 0x48) false)))) (bv 32 0x10) false)) (<< (| (<< (cast 256 false (cast 8 false (>> (append (var d3) (var d2)) (bv 8 0x50) false))) (bv 8 0x8) false) (cast 256 false (cast 8 false (>> (append (var d1) (var d0)) (bv 8 0x50) false)))) (bv 32 0x10) false)) (<< (| (<< (cast 256 false (cast 8 false (>> (append (var d3) (var d2)) (bv 8 0x58) false))) (bv 8 0x8) false) (cast 256 false (cast 8 false (>> (append (var d1) (var d0)) (bv 8 0x58) false)))) (bv 32 0x10) false)) (<< (| (<< (cast 256 false (cast 8 false (>> (append (var d3) (var d2)) (bv 8 0x60) false))) (bv 8 0x8) false) (cast 256 false (cast 8 false (>> (append (var d1) (var d0)) (bv 8 0x60) false)))) (bv 32 0x10) false)) (<< (| (<< (cast 256 false (cast 8 false (>> (append (var d3) (var d2)) (bv 8 0x68) false))) (bv 8 0x8) false) (cast 256 false (cast 8 false (>> (append (var d1) (var d0)) (bv 8 0x68) false)))) (bv 32 0x10) false)) (<< (| (<< (cast 256 false (cast 8 false (>> (append (var d3) (var d2)) (bv 8 0x70) false))) (bv 8 0x8) false) (cast 256 false (cast 8 false (>> (append (var d1) (var d0)) (bv 8 0x70) false)))) (bv 32 0x10) false)) (<< (| (<< (cast 256 false (cast 8 false (>> (append (var d3) (var d2)) (bv 8 0x78) false))) (bv 8 0x8) false) (cast 256 false (cast 8 false (>> (append (var d1) (var d0)) (bv 8 0x78) false)))) (bv 32 0x10) false)) (bv 8 0x8) false)) (bv 8 0x40) false))))
d "vzip.16 d2, d3" 8321b6f3 0x0 (seq (set d2 (cast 64 false (| (| (| (| (bv 128 0x0) (<< (| (<< (cast 128 false (cast 16 false (>> (var d3) (bv 8 0x0) false))) (bv 8 0x10) false) (cast 128 false (cast 16 false (>> (var d2) (bv 8 0x0) false)))) (bv 32 0x20) false)) (<< (| (<< (cast 128 false (cast 16 false (>> (var d3) (bv 8 0x10) false))) (bv 8 0x10) false) (cast 128 false (cast 16 false (>> (var d2) (bv 8 0x10) false)))) (bv 32 0x20) false)) (<< (| (<< (cast 128 false (cast 16 false (>> (var d3) (bv 8 0x20) false))) (bv 8 0x10) false) (cast 128 false (cast 16 false (>> (var d2) (bv 8 0x20) false)))) (bv 32 0x20) false)) (<< (| (<< (cast 128 false (cast 16 false (>> (var d3) (bv 8 0x30) false))) (bv 8 0x10) false) (cast 128 false (cast 16 false (>> (var d2) (bv 8 0x30) false)))) (bv 32 0x20) false)))) (set d3 (cast 64 false (>> (| (| (| (| (bv 128 0x0) (<< (| (<< (cast 128 false (cast 16 false (>> (var d3) (bv 8 0x0) false))) (bv 8 0x10) false) (cast 128 false (cast 16 false (>> (var d2) (bv 8 0x0) false)))) (bv 32 0x20) false)) (<< (| (<< (cast 128 false (cast 16 false (>> (var d3) (bv 8 0x10) false))) (bv 8 0x10) false) (cast 128 false (cast 16 false (>> (var d2) (bv 8 0x10) false)))) (bv 32 0x20) false)) (<< (| (<< (cast 128 false (cast 16 false (>> (var d3) (bv 8 0x20) false))) (bv 8 0x10) false) (cast 128 false (cast 16 false (>> (var d2) (bv 8 0x20) false)))) (bv 32 0x20) false)) (<< (| (<< (cast 128 false (cast 16 false (>> (var d3) (bv 8 0x30) false))) (bv 8 0x10) false) (cast 128 false (cast 16 false (>> (var d2) (bv 8 0x30) false)))) (bv 32 0x20) false)) (bv 8 0x10) false))))
d "vuzp.8 d0, d1" 0101b2f3 0x0 (seq (set d0 (| (| (| (| (bv 64 0x0) (| (<< (cast 64 false (cast 8 false (>> (var d0) (bv 8 0x0) false))) (bv 8 0x0) false) (<< (<< (cast 64 false (cast 8 false (>> (var d1) (bv 8 0x0) false))) (bv 8 0x0) false) (bv 8 0x20) false))) (| (<< (cast 64 false (cast 8 false (>> (var d0) (bv 8 0x10) false))) (bv 8 0x8) false) (<< (<< (cast 64 false (cast 8 false (>> (var d1) (bv 8 0x10) false))) (bv 8 0x8) false) (bv 8 0x20) false))) (| (<< (cast 64 false (cast 8 false (>> (var d0) (bv 8 0x20) false))) (bv 8 0x10) false) (<< (<< (cast 64 false (cast 8 false (>> (var d1) (bv 8 0x20) false))) (bv 8 0x10) false) (bv 8 0x20) false))) (| (<< (cast 64 false (cast 8 false (>> (var d0) (bv 8 0x30) false))) (bv 8 0x18) false) (<< (<< (cast 64 false (cast 8 false (>> (var d1) (bv 8 0x30) false))) (bv 8 0x18) false) (bv 8 0x20) false)))) (set d1 (| (| (| (| (bv 64 0x0) (| (<< (cast 64 false (cast 8 false (>> (var d0) (bv 8 0x8) false))) (bv 8 0x0) false) (<< (<< (cast 64 false (cast 8 false (>> (var d1) (bv 8 0x8) false))) (bv 8 0x0) false) (bv 8 0x20) false))) (| (<< (cast 64 false (cast 8 false (>> (var d0) (bv 8 0x18) false))) (bv 8 0x8) false) (<< (<< (cast 64 false (cast 8 false (>> (var d1) (bv 8 0x18) false))) (bv 8 0x8) false) (bv 8 0x20) false))) (| (<< (cast 64 false (cast 8 false (>> (var d0) (bv 8 0x28) false))) (bv 8 0x10) false) (<< (<< (cast 64 false (cast 8 false (>> (var d1) (bv 8 0x28) false))) (bv 8 0x10) false) (bv 8 0x20) false))) (| (<< (cast 64 false (cast 8 false (>> (var d0) (bv 8 0x38) false))) (bv 8 0x18) false) (<< (<< (cast 64 false (cast 8 false (>> (var d1) (bv 8 0x38) false))) (bv 8 0x18) false) (bv 8 0x20) false)))))
d "vuzp.8 q0, q1" 4201b2f3 0x0 (seq (set d0 (cast 64 false (| (| (| (| (| (| (| (| (bv 128 0x0) (| (<< (cast 128 false (cast 8 false (>> (append (var d1) (var d0)) (bv 8 0x0) false))) (bv 8 0x0) false) (<< (<< (cast 128 false (cast 8 false (>> (append (var d3) (var d2)) (bv 8 0x0) false))) (bv 8 0x0) false) (bv 8 0x40) false))) (| (<< (cast 128 false (cast 8 false (>> (append (var d1) (var d0)) (bv 8 0x10) false))) (bv 8 0x8) false) (<< (<< (cast 128 false (cast 8 false (>> (append (var d3) (var d2)) (bv 8 0x10) false))) (bv 8 0x8) false) (bv 8 0x40) false))) (| (<< (cast 128 false (cast 8 false (>> (append (var d1) (var d0)) (bv 8 0x20) false))) (bv 8 0x10) false) (<< (<< (cast 128 false (cast 8 false (>> (append (var d3) (var d2)) (bv 8 0x20) false))) (bv 8 0x10) false) (bv 8 0x40) false))) (| (<< (cast 128 false (cast 8 false (>> (append (var d1) (var d0)) (bv 8 0x30) false))) (bv 8 0x18) false) (<< (<< (cast 128 false (cast 8 false (>> (append (var d3) (var d2)) (bv 8 0x30) false))) (bv 8 0x18) false) (bv 8 0x40) false))) (| (<< (cast 128 false (cast 8 false (>> (append (var d1) (var d0)) (bv 8 0x40) false))) (bv 8 0x20) false) (<< (<< (cast 128 false (cast 8 false (>> (append (var d3) (var d2)) (bv 8 0x40) false))) (bv 8 0x20) false) (bv 8 0x40) false))) (| (<< (cast 128 false (cast 8 false (>> (append (var d1) (var d0)) (bv 8 0x50) false))) (bv 8 0x28) false) (<< (<< (cast 128 false (cast 8 false (>> (append (var d3) (var d2)) (bv 8 0x50) false))) (bv 8 0x28) false) (bv 8 0x40) false))) (| (<< (cast 128 false (cast 8 false (>> (append (var d1) (var d0)) (bv 8 0x60) false))) (bv 8 0x30) false) (<< (<< (cast 128 false (cast 8 false (>> (append (var d3) (var d2)) (bv 8 0x60) false))) (bv 8 0x30) false) (bv 8 0x40) false))) (| (<< (cast 128 false (cast 8 false (>> (append (var d1) (var d0)) (bv 8 0x70) false))) (bv 8 0x38) false) (<< (<< (cast 128 false (cast 8 false (>> (append (var d3) (var d2)) (bv 8 0x70) false))) (bv 8 0x38) false) (bv 8 0x40) false))))) (set d1 (cast 64 false (>> (| (| (| (| (| (| (| (| (bv 128 0x0) (| (<< (cast 128 false (cast 8 false (>> (append (var d1) (var d0)) (bv 8 0x0) false))) (bv 8 0x0) false) (<< (<< (cast 128 false (cast 8 false (>> (append (var d3) (var d2)) (bv 8 0x0) false))) (bv 8 0x0) false) (bv 8 0x40) false))) (| (<< (cast 128 false (cast 8 false (>> (append (var d1) (var d0)) (bv 8 0x10) false))) (bv 8 0x8) false) (<< (<< (cast 128 false (cast 8 false (>> (append (var d3) (var d2)) (bv 8 0x10) false))) (bv 8 0x8) false) (bv 8 0x40) false))) (| (<< (cast 128 false (cast 8 false (>> (append (var d1) (var d0)) (bv 8 0x20) false))) (bv 8 0x10) false) (<< (<< (cast 128 false (cast 8 false (>> (append (var d3) (var d2)) (bv 8 0x20) false))) (bv 8 0x10) false) (bv 8 0x40) false))) (| (<< (cast 128 false (cast 8 false (>> (append (var d1) (var d0)) (bv 8 0x30) false))) (bv 8 0x18) false) (<< (<< (cast 128 false (cast 8 false (>> (append (var d3) (var d2)) (bv 8 0x30) false))) (bv 8 0x18) false) (bv 8 0x40) false))) (| (<< (cast 128 false (cast 8 false (>> (append (var d1) (var d0)) (bv 8 0x40) false))) (bv 8 0x20) false) (<< (<< (cast 128 false (cast 8 false (>> (append (var d3) (var d2)) (bv 8 0x40) false))) (bv 8 0x20) false) (bv 8 0x40) false))) (| (<< (cast 128 false (cast 8 false (>> (append (var d1) (var d0)) (bv 8 0x50) false))) (bv 8 0x28) false) (<< (<< (cast 128 false (cast 8 false (>> (append (var d3) (var d2)) (bv 8 0x50) false))) (bv 8 0x28) false) (bv 8 0x40) false))) (| (<< (cast 128 false (cast 8 false (>> (append (var d1) (var d0)) (bv 8 0x60) false))) (bv 8 0x30) false) (<< (<< (cast 128 false (cast 8 false (>> (append (var d3) (var d2)) (bv 8 0x60) false))) (bv 8 0x30) false) (bv 8 0x40) false))) (| (<< (cast 128 false (cast 8 false (>> (append (var d1) (var d0)) (bv 8 0x70) false))) (bv 8 0x38) false) (<< (<< (cast 128 false (cast 8 false (>> (append (var d3) (var d2)) (bv 8 0x70) false))) (bv 8 0x38) false) (bv 8 0x40) false))) (bv 8 0x40) false))) (set d2 (cast 64 false (| (| (| (| (| (| (| (| (bv 128 0x0) (| (<< (cast 128 false (cast 8 false (>> (append (var d1) (var d0)) (bv 8 0x8) false))) (bv 8 0x0) false) (<< (<< (cast 128 false (cast 8 false (>> (append (var d3) (var d2)) (bv 8 0x8) false))) (bv 8 0x0) false) (bv 8 0x40) false))) (| (<< (cast 128 false (cast 8 false (>> (append (var d1) (var d0)) (bv 8 0x18) false))) (bv 8 0x8) false) (<< (<< (cast 128 false (cast 8 false (>> (append (var d3) (var d2)) (bv 8 0x18) false))) (bv 8 0x8) false) (bv 8 0x40) false))) (| (<< (cast 128 false (cast 8 false (>> (append (var d1) (var d0)) (bv 8 0x28) false))) (bv 8 0x10) false) (<< (<< (cast 128 false (cast 8 false (>> (append (var d3) (var d2)) (bv 8 0x28) false))) (bv 8 0x10) false) (bv 8 0x40) false))) (| (<< (cast 128 false (cast 8 false (>> (append (var d1) (var d0)) (bv 8 0x38) false))) (bv 8 0x18) false) (<< (<< (cast 128 false (cast 8 false (>> (append (var d3) (var d2)) (bv 8 0x38) false))) (bv 8 0x18) false) (bv 8 0x40) false))) (| (<< (cast 128 false (cast 8 false (>> (append (var d1) (var d0)) (bv 8 0x48) false))) (bv 8 0x20) false) (<< (<< (cast 128 false (cast 8 false (>> (append (var d3) (var d2)) (bv 8 0x48) false))) (bv 8 0x20) false) (bv 8 0x40) false))) (| (<< (cast 128 false (cast 8 false (>> (append (var d1) (var d0)) (bv 8 0x58) false))) (bv 8 0x28) false) (<< (<< (cast 128 false (cast 8 false (>> (append (var d3) (var d2)) (bv 8 0x58) false))) (bv 8 0x28) false) (bv 8 0x40) false))) (| (<< (cast 128 false (cast 8 false (>> (append (var d1) (var d0)) (bv 8 0x68) false))) (bv 8 0x30) false) (<< (<< (cast 128 false (cast 8 false (>> (append (var d3) (var d2)) (bv 8 0x68) false))) (bv 8 0x30) false) (bv 8 0x40) false))) (| (<< (cast 128 false (cast 8 false (>> (append (var d1) (var d0)) (bv 8 0x78) false))) (bv 8 0x38) false) (<< (<< (cast 128 false (cast 8 false (>> (append (var d3) (var d2)) (bv 8 0x78) false))) (bv 8 0x38) false) (bv 8 0x40) false))))) (set d3 (cast 64 false (>> (| (| (| (| (| (| (| (| (bv 128 0x0) (| (<< (cast 128 false (cast 8 false (>> (append (var d1) (var d0)) (bv 8 0x8) false))) (bv 8 0x0) false) (<< (<< (cast 128 false (cast 8 false (>> (append (var d3) (var d2)) (bv 8 0x8) false))) (bv 8 0x0) false) (bv 8 0x40) false))) (| (<< (cast 128 false (cast 8 false (>> (append (var d1) (var d0)) (bv 8 0x18) false))) (bv 8 0x8) false) (<< (<< (cast 128 false (cast 8 false (>> (append (var d3) (var d2)) (bv 8 0x18) false))) (bv 8 0x8) false) (bv 8 0x40) false))) (| (<< (cast 128 false (cast 8 false (>> (append (var d1) (var d0)) (bv 8 0x28) false))) (bv 8 0x10) false) (<< (<< (cast 128 false (cast 8 false (>> (append (var d3) (var d2)) (bv 8 0x28) false))) (bv 8 0x10) false) (bv 8 0x40) false))) (| (<< (cast 128 false (cast 8 false (>> (append (var d1) (var d0)) (bv 8 0x38) false))) (bv 8 0x18) false) (<< (<< (cast 128 false (cast 8 false (>> (append (var d3) (var d2)) (bv 8 0x38) false))) (bv 8 0x18) false) (bv 8 0x40) false))) (| (<< (cast 128 false (cast 8 false (>> (append (var d1) (var d0)) (bv 8 0x48) false))) (bv 8 0x20) false) (<< (<< (cast 128 false (cast 8 false (>> (append (var d3) (var d2)) (bv 8 0x48) false))) (bv 8 0x20) false) (bv 8 0x40) false))) (| (<< (cast 128 false (cast 8 false (>> (append (var d1) (var d0)) (bv 8 0x58) false))) (bv 8 0x28) false) (<< (<< (cast 128 false (cast 8 false (>> (append (var d3) (var d2)) (bv 8 0x58) false))) (bv 8 0x28) false) (bv 8 0x40) false))) (| (<< (cast 128 false (cast 8 false (>> (append (var d1) (var d0)) (bv 8 0x68) false))) (bv 8 0x30) false) (<< (<< (cast 128 false (cast 8 false (>> (append (var d3) (var d2)) (bv 8 0x68) false))) (bv 8 0x30) false) (bv 8 0x40) false))) (| (<< (cast 128 false (cast 8 false (>> (append (var d1) (var d0)) (bv 8 0x78) false))) (bv 8 0x38) false) (<< (<< (cast 128 false (cast 8 false (>> (append (var d3) (var d2)) (bv 8 0x78) false))) (bv 8 0x38) false) (bv 8 0x40) false))) (bv 8 0x40) false))))
d "vuzp.16 d2, d4" 0421b6f3 0x0 (seq (set d2 (| (| (bv 64 0x0) (| (<< (cast 64 false (cast 16 false (>> (var d2) (bv 8 0x0) false))) (bv 8 0x0) false) (<< (<< (cast 64 false (cast 16 false (>> (var d4) (bv 8 0x0) false))) (bv 8 0x0) false) (bv 8 0x20) false))) (| (<< (cast 64 false (cast 16 false (>> (var d2) (bv 8 0x20) false))) (bv 8 0x10) false) (<< (<< (cast 64 false (cast 16 false (>> (var d4) (bv 8 0x20) false))) (bv 8 0x10) false) (bv 8 0x20) false)))) (set d4 (| (| (bv 64 0x0) (| (<< (cast 64 false (cast 16 false (>> (var d2) (bv 8 0x10) false))) (bv 8 0x0) false) (<< (<< (cast 64 false (cast 16 false (>> (var d4) (bv 8 0x10) false))) (bv 8 0x0) false) (bv 8 0x20) false))) (| (<< (cast 64 false (cast 16 false (>> (var d2) (bv 8 0x30) false))) (bv 8 0x10) false) (<< (<< (cast 64 false (cast 16 false (>> (var d4) (bv 8 0x30) false))) (bv 8 0x10) false) (bv 8 0x20) false)))))
d "vld1.8 {d0}, [r1], r0" 000721f4 0x0 (seq empty (set d0 (<< (cast 64 false (loadw 0 8 (var r1))) (bv 8 0x0) false)) (set d0 (<< (cast 64 false (loadw 0 8 (+ (var r1) (bv 32 0x1)))) (bv 8 0x8) false)) (set d0 (<< (cast 64 false (loadw 0 8 (+ (+ (var r1) (bv 32 0x1)) (bv 32 0x1)))) (bv 8 0x10) false)) (set d0 (<< (cast 64 false (loadw 0 8 (+ (+ (+ (var r1) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)))) (bv 8 0x18) false)) (set d0 (<< (cast 64 false (loadw 0 8 (+ (+ (+ (+ (var r1) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)))) (bv 8 0x20) false)) (set d0 (<< (cast 64 false (loadw 0 8 (+ (+ (+ (+ (+ (var r1) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)))) (bv 8 0x28) false)) (set d0 (<< (cast 64 false (loadw 0 8 (+ (+ (+ (+ (+ (+ (var r1) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)))) (bv 8 0x30) false)) (set d0 (<< (cast 64 false (loadw 0 8 (+ (+ (+ (+ (+ (+ (+ (var r1) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)))) (bv 8 0x38) false)) (set r1 (+ (var r1) (var r0))))
d "vld1.16 {d1}, [r7]!" 4d1727f4 0x0 (seq empty (set d1 (<< (cast 64 false (loadw 0 16 (var r7))) (bv 8 0x0) false)) (set d1 (<< (cast 64 false (loadw 0 16 (+ (var r7) (bv 32 0x2)))) (bv 8 0x10) false)) (set d1 (<< (cast 64 false (loadw 0 16 (+ (+ (var r7) (bv 32 0x2)) (bv 32 0x2)))) (bv 8 0x20) false)) (set d1 (<< (cast 64 false (loadw 0 16 (+ (+ (+ (var r7) (bv 32 0x2)) (bv 32 0x2)) (bv 32 0x2)))) (bv 8 0x30) false)) (set r7 (+ (var r7) (bv 32 0x8))))
d "vld1.16 {d1}, [r7]" 4f1727f4 0x0 (seq empty (set d1 (<< (cast 64 false (loadw 0 16 (var r7))) (bv 8 0x0) false)) (set d1 (<< (cast 64 false (loadw 0 16 (+ (var r7) (bv 32 0x2)))) (bv 8 0x10) false)) (set d1 (<< (cast 64 false (loadw 0 16 (+ (+ (var r7) (bv 32 0x2)) (bv 32 0x2)))) (bv 8 0x20) false)) (set d1 (<< (cast 64 false (loadw 0 16 (+ (+ (+ (var r7) (bv 32 0x2)) (bv 32 0x2)) (bv 32 0x2)))) (bv 8 0x30) false)) empty)
d "vld1.32 {d1}, [r7]" 8f1727f4 0x0 (seq empty (set d1 (<< (cast 64 false (loadw 0 32 (var r7))) (bv 8 0x0) false)) (set d1 (<< (cast 64 false (loadw 0 32 (+ (var r7) (bv 32 0x4)))) (bv 8 0x20) false)) empty)
d "vld1.8 {d0[]}, [r1]" 0f0ca1f4 0x0 (seq empty (set d0 (<< (cast 64 false (loadw 0 8 (var r1))) (bv 8 0x0) false)) (set d0 (<< (cast 64 false (loadw 0 8 (+ (var r1) (bv 32 0x1)))) (bv 8 0x8) false)) (set d0 (<< (cast 64 false (loadw 0 8 (+ (+ (var r1) (bv 32 0x1)) (bv 32 0x1)))) (bv 8 0x10) false)) (set d0 (<< (cast 64 false (loadw 0 8 (+ (+ (+ (var r1) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)))) (bv 8 0x18) false)) (set d0 (<< (cast 64 false (loadw 0 8 (+ (+ (+ (+ (var r1) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)))) (bv 8 0x20) false)) (set d0 (<< (cast 64 false (loadw 0 8 (+ (+ (+ (+ (+ (var r1) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)))) (bv 8 0x28) false)) (set d0 (<< (cast 64 false (loadw 0 8 (+ (+ (+ (+ (+ (+ (var r1) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)))) (bv 8 0x30) false)) (set d0 (<< (cast 64 false (loadw 0 8 (+ (+ (+ (+ (+ (+ (+ (var r1) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)))) (bv 8 0x38) false)) empty)
d "vld1.8 {d0[1]}, [r1]" 2f00a1f4 0x0 (seq (set d0 (<< (cast 64 false (loadw 0 8 (var r1))) (bv 8 0x8) false)) empty)
d "vld2.8 {d0[], d2[]}, [r7]" 2f0da7f4 0x0 (seq empty (set d0 (<< (cast 64 false (loadw 0 8 (var r7))) (bv 8 0x0) false)) (set d2 (<< (cast 64 false (loadw 0 8 (+ (var r7) (bv 32 0x1)))) (bv 8 0x0) false)) (set d0 (<< (cast 64 false (loadw 0 8 (+ (+ (var r7) (bv 32 0x1)) (bv 32 0x1)))) (bv 8 0x8) false)) (set d2 (<< (cast 64 false (loadw 0 8 (+ (+ (+ (var r7) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)))) (bv 8 0x8) false)) (set d0 (<< (cast 64 false (loadw 0 8 (+ (+ (+ (+ (var r7) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)))) (bv 8 0x10) false)) (set d2 (<< (cast 64 false (loadw 0 8 (+ (+ (+ (+ (+ (var r7) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)))) (bv 8 0x10) false)) (set d0 (<< (cast 64 false (loadw 0 8 (+ (+ (+ (+ (+ (+ (var r7) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)))) (bv 8 0x18) false)) (set d2 (<< (cast 64 false (loadw 0 8 (+ (+ (+ (+ (+ (+ (+ (var r7) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)))) (bv 8 0x18) false)) (set d0 (<< (cast 64 false (loadw 0 8 (+ (+ (+ (+ (+ (+ (+ (+ (var r7) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)))) (bv 8 0x20) false)) (set d2 (<< (cast 64 false (loadw 0 8 (+ (+ (+ (+ (+ (+ (+ (+ (+ (var r7) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)))) (bv 8 0x20) false)) (set d0 (<< (cast 64 false (loadw 0 8 (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (var r7) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)))) (bv 8 0x28) false)) (set d2 (<< (cast 64 false (loadw 0 8 (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (var r7) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)))) (bv 8 0x28) false)) (set d0 (<< (cast 64 false (loadw 0 8 (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (var r7) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)))) (bv 8 0x30) false)) (set d2 (<< (cast 64 false (loadw 0 8 (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (var r7) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)))) (bv 8 0x30) false)) (set d0 (<< (cast 64 false (loadw 0 8 (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (var r7) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)))) (bv 8 0x38) false)) (set d2 (<< (cast 64 false (loadw 0 8 (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (var r7) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)))) (bv 8 0x38) false)) empty)
d "vld2.16 {d0[], d1[]}, [r8]" 4f0da8f4 0x0 (seq empty (set d0 (<< (cast 64 false (loadw 0 16 (var r8))) (bv 8 0x0) false)) (set d1 (<< (cast 64 false (loadw 0 16 (+ (var r8) (bv 32 0x2)))) (bv 8 0x0) false)) (set d0 (<< (cast 64 false (loadw 0 16 (+ (+ (var r8) (bv 32 0x2)) (bv 32 0x2)))) (bv 8 0x10) false)) (set d1 (<< (cast 64 false (loadw 0 16 (+ (+ (+ (var r8) (bv 32 0x2)) (bv 32 0x2)) (bv 32 0x2)))) (bv 8 0x10) false)) (set d0 (<< (cast 64 false (loadw 0 16 (+ (+ (+ (+ (var r8) (bv 32 0x2)) (bv 32 0x2)) (bv 32 0x2)) (bv 32 0x2)))) (bv 8 0x20) false)) (set d1 (<< (cast 64 false (loadw 0 16 (+ (+ (+ (+ (+ (var r8) (bv 32 0x2)) (bv 32 0x2)) (bv 32 0x2)) (bv 32 0x2)) (bv 32 0x2)))) (bv 8 0x20) false)) (set d0 (<< (cast 64 false (loadw 0 16 (+ (+ (+ (+ (+ (+ (var r8) (bv 32 0x2)) (bv 32 0x2)) (bv 32 0x2)) (bv 32 0x2)) (bv 32 0x2)) (bv 32 0x2)))) (bv 8 0x30) false)) (set d1 (<< (cast 64 false (loadw 0 16 (+ (+ (+ (+ (+ (+ (+ (var r8) (bv 32 0x2)) (bv 32 0x2)) (bv 32 0x2)) (bv 32 0x2)) (bv 32 0x2)) (bv 32 0x2)) (bv 32 0x2)))) (bv 8 0x30) false)) empty)
d "vld3.8 {d0[0], d1[0], d2[0]}, [r1]" 0f02a1f4 0x0 (seq (set d0 (<< (cast 64 false (loadw 0 8 (var r1))) (bv 8 0x0) false)) (set d1 (<< (cast 64 false (loadw 0 8 (+ (var r1) (bv 32 0x1)))) (bv 8 0x0) false)) (set d2 (<< (cast 64 false (loadw 0 8 (+ (+ (var r1) (bv 32 0x1)) (bv 32 0x1)))) (bv 8 0x0) false)) empty)
d "vld3.8 {d0[], d2[], d4[]}, [r2]" 2f0ea2f4 0x0 (seq empty (set d0 (<< (cast 64 false (loadw 0 8 (var r2))) (bv 8 0x0) false)) (set d2 (<< (cast 64 false (loadw 0 8 (+ (var r2) (bv 32 0x1)))) (bv 8 0x0) false)) (set d4 (<< (cast 64 false (loadw 0 8 (+ (+ (var r2) (bv 32 0x1)) (bv 32 0x1)))) (bv 8 0x0) false)) (set d0 (<< (cast 64 false (loadw 0 8 (+ (+ (+ (var r2) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)))) (bv 8 0x8) false)) (set d2 (<< (cast 64 false (loadw 0 8 (+ (+ (+ (+ (var r2) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)))) (bv 8 0x8) false)) (set d4 (<< (cast 64 false (loadw 0 8 (+ (+ (+ (+ (+ (var r2) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)))) (bv 8 0x8) false)) (set d0 (<< (cast 64 false (loadw 0 8 (+ (+ (+ (+ (+ (+ (var r2) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)))) (bv 8 0x10) false)) (set d2 (<< (cast 64 false (loadw 0 8 (+ (+ (+ (+ (+ (+ (+ (var r2) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)))) (bv 8 0x10) false)) (set d4 (<< (cast 64 false (loadw 0 8 (+ (+ (+ (+ (+ (+ (+ (+ (var r2) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)))) (bv 8 0x10) false)) (set d0 (<< (cast 64 false (loadw 0 8 (+ (+ (+ (+ (+ (+ (+ (+ (+ (var r2) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)))) (bv 8 0x18) false)) (set d2 (<< (cast 64 false (loadw 0 8 (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (var r2) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)))) (bv 8 0x18) false)) (set d4 (<< (cast 64 false (loadw 0 8 (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (var r2) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)))) (bv 8 0x18) false)) (set d0 (<< (cast 64 false (loadw 0 8 (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (var r2) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)))) (bv 8 0x20) false)) (set d2 (<< (cast 64 false (loadw 0 8 (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (var r2) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)))) (bv 8 0x20) false)) (set d4 (<< (cast 64 false (loadw 0 8 (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (var r2) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)))) (bv 8 0x20) false)) (set d0 (<< (cast 64 false (loadw 0 8 (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (var r2) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)))) (bv 8 0x28) false)) (set d2 (<< (cast 64 false (loadw 0 8 (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (var r2) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)))) (bv 8 0x28) false)) (set d4 (<< (cast 64 false (loadw 0 8 (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (var r2) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)))) (bv 8 0x28) false)) (set d0 (<< (cast 64 false (loadw 0 8 (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (var r2) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 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0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)))) (bv 8 0x38) false)) (set d2 (<< (cast 64 false (loadw 0 8 (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (var r2) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)))) (bv 8 0x38) false)) (set d4 (<< (cast 64 false (loadw 0 8 (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (var r2) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 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d "vld3.32 {d0[0], d2[0], d4[0]}, [r1]" 4f0aa1f4 0x0 (seq (set d0 (<< (cast 64 false (loadw 0 32 (var r1))) (bv 8 0x0) false)) (set d2 (<< (cast 64 false (loadw 0 32 (+ (var r1) (bv 32 0x4)))) (bv 8 0x0) false)) (set d4 (<< (cast 64 false (loadw 0 32 (+ (+ (var r1) (bv 32 0x4)) (bv 32 0x4)))) (bv 8 0x0) false)) empty)
d "vld4.8 {d0[0], d1[0], d2[0], d3[0]}, [r2]" 0f03a2f4 0x0 (seq (set d0 (<< (cast 64 false (loadw 0 8 (var r2))) (bv 8 0x0) false)) (set d1 (<< (cast 64 false (loadw 0 8 (+ (var r2) (bv 32 0x1)))) (bv 8 0x0) false)) (set d2 (<< (cast 64 false (loadw 0 8 (+ (+ (var r2) (bv 32 0x1)) (bv 32 0x1)))) (bv 8 0x0) false)) (set d3 (<< (cast 64 false (loadw 0 8 (+ (+ (+ (var r2) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)))) (bv 8 0x0) false)) empty)
d "vld4.16 {d0[2], d2[2], d4[2], d6[2]}, [r2]" af07a2f4 0x0 (seq (set d0 (<< (cast 64 false (loadw 0 16 (var r2))) (bv 8 0x20) false)) (set d2 (<< (cast 64 false (loadw 0 16 (+ (var r2) (bv 32 0x2)))) (bv 8 0x20) false)) (set d4 (<< (cast 64 false (loadw 0 16 (+ (+ (var r2) (bv 32 0x2)) (bv 32 0x2)))) (bv 8 0x20) false)) (set d6 (<< (cast 64 false (loadw 0 16 (+ (+ (+ (var r2) (bv 32 0x2)) (bv 32 0x2)) (bv 32 0x2)))) (bv 8 0x20) false)) empty)
d "vld1.8 {d0, d1, d2}, [r0]" 0f0620f4 0x0 (seq empty (set d0 (<< (cast 64 false (loadw 0 8 (var r0))) (bv 8 0x0) false)) (set d0 (<< (cast 64 false (loadw 0 8 (+ (var r0) (bv 32 0x1)))) (bv 8 0x8) false)) (set d0 (<< (cast 64 false (loadw 0 8 (+ (+ (var r0) (bv 32 0x1)) (bv 32 0x1)))) (bv 8 0x10) false)) (set d0 (<< (cast 64 false (loadw 0 8 (+ (+ (+ (var r0) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)))) (bv 8 0x18) false)) (set d0 (<< (cast 64 false (loadw 0 8 (+ (+ (+ (+ (var r0) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)))) (bv 8 0x20) false)) (set d0 (<< (cast 64 false (loadw 0 8 (+ (+ (+ (+ (+ (var r0) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)))) (bv 8 0x28) false)) (set d0 (<< (cast 64 false (loadw 0 8 (+ (+ (+ (+ (+ (+ (var r0) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)))) (bv 8 0x30) false)) (set d0 (<< (cast 64 false (loadw 0 8 (+ (+ (+ (+ (+ (+ (+ (var r0) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 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(bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)))) (bv 8 0x38) false)) (set d2 (<< (cast 64 false (loadw 0 8 (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (var r0) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)))) (bv 8 0x0) false)) (set d2 (<< (cast 64 false (loadw 0 8 (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (var r0) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)))) (bv 8 0x8) false)) (set d2 (<< (cast 64 false (loadw 0 8 (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (var r0) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 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0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)))) (bv 8 0x38) false)) empty)
d "vld2.8 {d0, d2}, [r0]" 0f0920f4 0x0 (seq empty (set d0 (<< (cast 64 false (loadw 0 8 (var r0))) (bv 8 0x0) false)) (set d2 (<< (cast 64 false (loadw 0 8 (+ (var r0) (bv 32 0x1)))) (bv 8 0x0) false)) (set d0 (<< (cast 64 false (loadw 0 8 (+ (+ (var r0) (bv 32 0x1)) (bv 32 0x1)))) (bv 8 0x8) false)) (set d2 (<< (cast 64 false (loadw 0 8 (+ (+ (+ (var r0) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)))) (bv 8 0x8) false)) (set d0 (<< (cast 64 false (loadw 0 8 (+ (+ (+ (+ (var r0) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)))) (bv 8 0x10) false)) (set d2 (<< (cast 64 false (loadw 0 8 (+ (+ (+ (+ (+ (var r0) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)))) (bv 8 0x10) false)) (set d0 (<< (cast 64 false (loadw 0 8 (+ (+ (+ (+ (+ (+ (var r0) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)))) (bv 8 0x18) false)) (set d2 (<< (cast 64 false (loadw 0 8 (+ (+ (+ (+ (+ (+ (+ (var r0) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)))) (bv 8 0x18) false)) (set d0 (<< (cast 64 false (loadw 0 8 (+ (+ (+ (+ (+ (+ (+ (+ (var r0) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)))) (bv 8 0x20) false)) (set d2 (<< (cast 64 false (loadw 0 8 (+ (+ (+ (+ (+ (+ (+ (+ (+ (var r0) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)))) (bv 8 0x20) false)) (set d0 (<< (cast 64 false (loadw 0 8 (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (var r0) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)))) (bv 8 0x28) false)) (set d2 (<< (cast 64 false (loadw 0 8 (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (var r0) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)))) (bv 8 0x28) false)) (set d0 (<< (cast 64 false (loadw 0 8 (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (var r0) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)))) (bv 8 0x30) false)) (set d2 (<< (cast 64 false (loadw 0 8 (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (var r0) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)))) (bv 8 0x30) false)) (set d0 (<< (cast 64 false (loadw 0 8 (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (var r0) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)))) (bv 8 0x38) false)) (set d2 (<< (cast 64 false (loadw 0 8 (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (var r0) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)))) (bv 8 0x38) false)) empty)
d "vld3.8 {d0, d1, d2}, [r0]" 0f0420f4 0x0 (seq empty (set d0 (<< (cast 64 false (loadw 0 8 (var r0))) (bv 8 0x0) false)) (set d1 (<< (cast 64 false (loadw 0 8 (+ (var r0) (bv 32 0x1)))) (bv 8 0x0) false)) (set d2 (<< (cast 64 false (loadw 0 8 (+ (+ (var r0) (bv 32 0x1)) (bv 32 0x1)))) (bv 8 0x0) false)) (set d0 (<< (cast 64 false (loadw 0 8 (+ (+ (+ (var r0) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)))) (bv 8 0x8) false)) (set d1 (<< (cast 64 false (loadw 0 8 (+ (+ (+ (+ (var r0) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)))) (bv 8 0x8) false)) (set d2 (<< (cast 64 false (loadw 0 8 (+ (+ (+ (+ (+ (var r0) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)))) (bv 8 0x8) false)) (set d0 (<< (cast 64 false (loadw 0 8 (+ (+ (+ (+ (+ (+ (var r0) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)))) (bv 8 0x10) false)) (set d1 (<< (cast 64 false (loadw 0 8 (+ (+ (+ (+ (+ (+ (+ (var r0) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) 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0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)))) (bv 8 0x28) false)) (set d0 (<< (cast 64 false (loadw 0 8 (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (var r0) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)))) (bv 8 0x30) false)) (set d1 (<< (cast 64 false (loadw 0 8 (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (var r0) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)))) (bv 8 0x30) false)) (set d2 (<< (cast 64 false (loadw 0 8 (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (var r0) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)))) (bv 8 0x30) false)) (set d3 (<< (cast 64 false (loadw 0 8 (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (var r0) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)))) (bv 8 0x30) false)) (set d0 (<< (cast 64 false (loadw 0 8 (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (var r0) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)))) (bv 8 0x38) false)) (set d1 (<< (cast 64 false (loadw 0 8 (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (var r0) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)))) (bv 8 0x38) false)) (set d2 (<< (cast 64 false (loadw 0 8 (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (var r0) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)))) (bv 8 0x38) false)) (set d3 (<< (cast 64 false (loadw 0 8 (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (var r0) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)))) (bv 8 0x38) false)) empty)
d "vst1.8 {d0}, [r1], r0" 000701f4 0x0 (seq empty (storew 0 (var r1) (cast 8 false (>> (var d0) (bv 8 0x0) false))) (storew 0 (+ (var r1) (bv 32 0x1)) (cast 8 false (>> (var d0) (bv 8 0x8) false))) (storew 0 (+ (+ (var r1) (bv 32 0x1)) (bv 32 0x1)) (cast 8 false (>> (var d0) (bv 8 0x10) false))) (storew 0 (+ (+ (+ (var r1) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (cast 8 false (>> (var d0) (bv 8 0x18) false))) (storew 0 (+ (+ (+ (+ (var r1) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (cast 8 false (>> (var d0) (bv 8 0x20) false))) (storew 0 (+ (+ (+ (+ (+ (var r1) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (cast 8 false (>> (var d0) (bv 8 0x28) false))) (storew 0 (+ (+ (+ (+ (+ (+ (var r1) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (cast 8 false (>> (var d0) (bv 8 0x30) false))) (storew 0 (+ (+ (+ (+ (+ (+ (+ (var r1) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (cast 8 false (>> (var d0) (bv 8 0x38) false))) (set r1 (+ (var r1) (var r0))))
d "vst1.16 {d1}, [r7]!" 4d1707f4 0x0 (seq empty (storew 0 (var r7) (cast 16 false (>> (var d1) (bv 8 0x0) false))) (storew 0 (+ (var r7) (bv 32 0x2)) (cast 16 false (>> (var d1) (bv 8 0x10) false))) (storew 0 (+ (+ (var r7) (bv 32 0x2)) (bv 32 0x2)) (cast 16 false (>> (var d1) (bv 8 0x20) false))) (storew 0 (+ (+ (+ (var r7) (bv 32 0x2)) (bv 32 0x2)) (bv 32 0x2)) (cast 16 false (>> (var d1) (bv 8 0x30) false))) (set r7 (+ (var r7) (bv 32 0x8))))
d "vst1.16 {d1}, [r7]" 4f1707f4 0x0 (seq empty (storew 0 (var r7) (cast 16 false (>> (var d1) (bv 8 0x0) false))) (storew 0 (+ (var r7) (bv 32 0x2)) (cast 16 false (>> (var d1) (bv 8 0x10) false))) (storew 0 (+ (+ (var r7) (bv 32 0x2)) (bv 32 0x2)) (cast 16 false (>> (var d1) (bv 8 0x20) false))) (storew 0 (+ (+ (+ (var r7) (bv 32 0x2)) (bv 32 0x2)) (bv 32 0x2)) (cast 16 false (>> (var d1) (bv 8 0x30) false))) empty)
d "vst1.32 {d1}, [r7]" 8f1707f4 0x0 (seq empty (storew 0 (var r7) (cast 32 false (>> (var d1) (bv 8 0x0) false))) (storew 0 (+ (var r7) (bv 32 0x4)) (cast 32 false (>> (var d1) (bv 8 0x20) false))) empty)
d "vst1.8 {d0[1]}, [r1]" 2f0081f4 0x0 (seq (storew 0 (var r1) (cast 8 false (>> (var d0) (bv 8 0x8) false))) empty)
d "vst3.8 {d0[0], d1[0], d2[0]}, [r1]" 0f0281f4 0x0 (seq (storew 0 (var r1) (cast 8 false (>> (var d0) (bv 8 0x0) false))) (storew 0 (+ (var r1) (bv 32 0x1)) (cast 8 false (>> (var d1) (bv 8 0x0) false))) (storew 0 (+ (+ (var r1) (bv 32 0x1)) (bv 32 0x1)) (cast 8 false (>> (var d2) (bv 8 0x0) false))) empty)
d "vst3.32 {d0[0], d2[0], d4[0]}, [r1]" 4f0a81f4 0x0 (seq (storew 0 (var r1) (cast 32 false (>> (var d0) (bv 8 0x0) false))) (storew 0 (+ (var r1) (bv 32 0x4)) (cast 32 false (>> (var d2) (bv 8 0x0) false))) (storew 0 (+ (+ (var r1) (bv 32 0x4)) (bv 32 0x4)) (cast 32 false (>> (var d4) (bv 8 0x0) false))) empty)
d "vst4.8 {d0[0], d1[0], d2[0], d3[0]}, [r2]" 0f0382f4 0x0 (seq (storew 0 (var r2) (cast 8 false (>> (var d0) (bv 8 0x0) false))) (storew 0 (+ (var r2) (bv 32 0x1)) (cast 8 false (>> (var d1) (bv 8 0x0) false))) (storew 0 (+ (+ (var r2) (bv 32 0x1)) (bv 32 0x1)) (cast 8 false (>> (var d2) (bv 8 0x0) false))) (storew 0 (+ (+ (+ (var r2) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (cast 8 false (>> (var d3) (bv 8 0x0) false))) empty)
d "vst4.16 {d0[2], d2[2], d4[2], d6[2]}, [r2]" af0782f4 0x0 (seq (storew 0 (var r2) (cast 16 false (>> (var d0) (bv 8 0x20) false))) (storew 0 (+ (var r2) (bv 32 0x2)) (cast 16 false (>> (var d2) (bv 8 0x20) false))) (storew 0 (+ (+ (var r2) (bv 32 0x2)) (bv 32 0x2)) (cast 16 false (>> (var d4) (bv 8 0x20) false))) (storew 0 (+ (+ (+ (var r2) (bv 32 0x2)) (bv 32 0x2)) (bv 32 0x2)) (cast 16 false (>> (var d6) (bv 8 0x20) false))) empty)
d "vst1.8 {d0, d1, d2}, [r0]" 0f0600f4 0x0 (seq empty (storew 0 (var r0) (cast 8 false (>> (var d0) (bv 8 0x0) false))) (storew 0 (+ (var r0) (bv 32 0x1)) (cast 8 false (>> (var d0) (bv 8 0x8) false))) (storew 0 (+ (+ (var r0) (bv 32 0x1)) (bv 32 0x1)) (cast 8 false (>> (var d0) (bv 8 0x10) false))) (storew 0 (+ (+ (+ (var r0) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (cast 8 false (>> (var d0) (bv 8 0x18) false))) (storew 0 (+ (+ (+ (+ (var r0) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (cast 8 false (>> (var d0) (bv 8 0x20) false))) (storew 0 (+ (+ (+ (+ (+ (var r0) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (cast 8 false (>> (var d0) (bv 8 0x28) false))) (storew 0 (+ (+ (+ (+ (+ (+ (var r0) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (cast 8 false (>> (var d0) (bv 8 0x30) false))) (storew 0 (+ (+ (+ (+ (+ (+ (+ (var r0) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (cast 8 false (>> (var d0) (bv 8 0x38) false))) (storew 0 (+ (+ (+ (+ (+ (+ (+ (+ (var r0) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (cast 8 false (>> (var d1) (bv 8 0x0) false))) (storew 0 (+ (+ (+ (+ (+ (+ (+ (+ (+ (var r0) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (cast 8 false (>> (var d1) (bv 8 0x8) false))) (storew 0 (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (var r0) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (cast 8 false (>> (var d1) (bv 8 0x10) false))) (storew 0 (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (var r0) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (cast 8 false (>> (var d1) (bv 8 0x18) false))) (storew 0 (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (var r0) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (cast 8 false (>> (var d1) (bv 8 0x20) false))) (storew 0 (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (var r0) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (cast 8 false (>> (var d1) (bv 8 0x28) false))) (storew 0 (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (var r0) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (cast 8 false (>> (var d1) (bv 8 0x30) false))) (storew 0 (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (var r0) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (cast 8 false (>> (var d1) (bv 8 0x38) false))) (storew 0 (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (var r0) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (cast 8 false (>> (var d2) (bv 8 0x0) false))) (storew 0 (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (var r0) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (cast 8 false (>> (var d2) (bv 8 0x8) false))) (storew 0 (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (var r0) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (cast 8 false (>> (var d2) (bv 8 0x10) false))) (storew 0 (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (var r0) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (cast 8 false (>> (var d2) (bv 8 0x18) false))) (storew 0 (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (var r0) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (cast 8 false (>> (var d2) (bv 8 0x20) false))) (storew 0 (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (var r0) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (cast 8 false (>> (var d2) (bv 8 0x28) false))) (storew 0 (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (var r0) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (cast 8 false (>> (var d2) (bv 8 0x30) false))) (storew 0 (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (var r0) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (cast 8 false (>> (var d2) (bv 8 0x38) false))) empty)
d "vst2.8 {d0, d2}, [r0]" 0f0900f4 0x0 (seq empty (storew 0 (var r0) (cast 8 false (>> (var d0) (bv 8 0x0) false))) (storew 0 (+ (var r0) (bv 32 0x1)) (cast 8 false (>> (var d2) (bv 8 0x0) false))) (storew 0 (+ (+ (var r0) (bv 32 0x1)) (bv 32 0x1)) (cast 8 false (>> (var d0) (bv 8 0x8) false))) (storew 0 (+ (+ (+ (var r0) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (cast 8 false (>> (var d2) (bv 8 0x8) false))) (storew 0 (+ (+ (+ (+ (var r0) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (cast 8 false (>> (var d0) (bv 8 0x10) false))) (storew 0 (+ (+ (+ (+ (+ (var r0) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (cast 8 false (>> (var d2) (bv 8 0x10) false))) (storew 0 (+ (+ (+ (+ (+ (+ (var r0) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (cast 8 false (>> (var d0) (bv 8 0x18) false))) (storew 0 (+ (+ (+ (+ (+ (+ (+ (var r0) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (cast 8 false (>> (var d2) (bv 8 0x18) false))) (storew 0 (+ (+ (+ (+ (+ (+ (+ (+ (var r0) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (cast 8 false (>> (var d0) (bv 8 0x20) false))) (storew 0 (+ (+ (+ (+ (+ (+ (+ (+ (+ (var r0) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (cast 8 false (>> (var d2) (bv 8 0x20) false))) (storew 0 (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (var r0) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (cast 8 false (>> (var d0) (bv 8 0x28) false))) (storew 0 (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (var r0) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (cast 8 false (>> (var d2) (bv 8 0x28) false))) (storew 0 (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (var r0) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (cast 8 false (>> (var d0) (bv 8 0x30) false))) (storew 0 (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (var r0) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (cast 8 false (>> (var d2) (bv 8 0x30) false))) (storew 0 (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (var r0) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (cast 8 false (>> (var d0) (bv 8 0x38) false))) (storew 0 (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (var r0) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (cast 8 false (>> (var d2) (bv 8 0x38) false))) empty)
d "vst3.8 {d0, d1, d2}, [r0]" 0f0400f4 0x0 (seq empty (storew 0 (var r0) (cast 8 false (>> (var d0) (bv 8 0x0) false))) (storew 0 (+ (var r0) (bv 32 0x1)) (cast 8 false (>> (var d1) (bv 8 0x0) false))) (storew 0 (+ (+ (var r0) (bv 32 0x1)) (bv 32 0x1)) (cast 8 false (>> (var d2) (bv 8 0x0) false))) (storew 0 (+ (+ (+ (var r0) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (cast 8 false (>> (var d0) (bv 8 0x8) false))) (storew 0 (+ (+ (+ (+ (var r0) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (cast 8 false (>> (var d1) (bv 8 0x8) false))) (storew 0 (+ (+ (+ (+ (+ (var r0) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (cast 8 false (>> (var d2) (bv 8 0x8) false))) (storew 0 (+ (+ (+ (+ (+ (+ (var r0) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (cast 8 false (>> (var d0) (bv 8 0x10) false))) (storew 0 (+ (+ (+ (+ (+ (+ (+ (var r0) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (cast 8 false (>> (var d1) (bv 8 0x10) false))) (storew 0 (+ (+ (+ (+ (+ (+ (+ (+ (var r0) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (cast 8 false (>> (var d2) (bv 8 0x10) false))) (storew 0 (+ (+ (+ (+ (+ (+ (+ (+ (+ (var r0) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (cast 8 false (>> (var d0) (bv 8 0x18) false))) (storew 0 (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (var r0) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (cast 8 false (>> (var d1) (bv 8 0x18) false))) (storew 0 (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (var r0) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (cast 8 false (>> (var d2) (bv 8 0x18) false))) (storew 0 (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (var r0) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (cast 8 false (>> (var d0) (bv 8 0x20) false))) (storew 0 (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (var r0) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (cast 8 false (>> (var d1) (bv 8 0x20) false))) (storew 0 (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (var r0) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (cast 8 false (>> (var d2) (bv 8 0x20) false))) (storew 0 (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (var r0) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (cast 8 false (>> (var d0) (bv 8 0x28) false))) (storew 0 (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (var r0) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (cast 8 false (>> (var d1) (bv 8 0x28) false))) (storew 0 (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (var r0) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (cast 8 false (>> (var d2) (bv 8 0x28) false))) (storew 0 (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (var r0) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (cast 8 false (>> (var d0) (bv 8 0x30) false))) (storew 0 (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (var r0) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (cast 8 false (>> (var d1) (bv 8 0x30) false))) (storew 0 (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (var r0) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (cast 8 false (>> (var d2) (bv 8 0x30) false))) (storew 0 (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (var r0) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (cast 8 false (>> (var d0) (bv 8 0x38) false))) (storew 0 (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (var r0) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (cast 8 false (>> (var d1) (bv 8 0x38) false))) (storew 0 (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (var r0) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (cast 8 false (>> (var d2) (bv 8 0x38) false))) empty)
d "vst4.8 {d0, d1, d2, d3}, [r0]" 0f0000f4 0x0 (seq empty (storew 0 (var r0) (cast 8 false (>> (var d0) (bv 8 0x0) false))) (storew 0 (+ (var r0) (bv 32 0x1)) (cast 8 false (>> (var d1) (bv 8 0x0) false))) (storew 0 (+ (+ (var r0) (bv 32 0x1)) (bv 32 0x1)) (cast 8 false (>> (var d2) (bv 8 0x0) false))) (storew 0 (+ (+ (+ (var r0) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (cast 8 false (>> (var d3) (bv 8 0x0) false))) (storew 0 (+ (+ (+ (+ (var r0) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (cast 8 false (>> (var d0) (bv 8 0x8) false))) (storew 0 (+ (+ (+ (+ (+ (var r0) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (cast 8 false (>> (var d1) (bv 8 0x8) false))) (storew 0 (+ (+ (+ (+ (+ (+ (var r0) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (cast 8 false (>> (var d2) (bv 8 0x8) false))) (storew 0 (+ (+ (+ (+ (+ (+ (+ (var r0) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (cast 8 false (>> (var d3) (bv 8 0x8) false))) (storew 0 (+ (+ (+ (+ (+ (+ (+ (+ (var r0) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (cast 8 false (>> (var d0) (bv 8 0x10) false))) (storew 0 (+ (+ (+ (+ (+ (+ (+ (+ (+ (var r0) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (cast 8 false (>> (var d1) (bv 8 0x10) false))) (storew 0 (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (var r0) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (cast 8 false (>> (var d2) (bv 8 0x10) false))) (storew 0 (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (var r0) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (cast 8 false (>> (var d3) (bv 8 0x10) false))) (storew 0 (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (var r0) (bv 32 0x1)) (bv 32 0x1)) (bv 32 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(cast 8 false (>> (var d3) (bv 8 0x18) false))) (storew 0 (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (var r0) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (cast 8 false (>> (var d0) (bv 8 0x20) false))) (storew 0 (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (var r0) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (cast 8 false (>> (var d1) (bv 8 0x20) false))) (storew 0 (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (var r0) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1)) (bv 32 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