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.TH "ibv_alloc_dmah" "3" "2025-5-8" "libibverbs" "Libibverbs Programmer\[cq]s Manual"
.hy
.SH NAME
.PP
ibv_alloc_dmah - allocate a dma handle
.PP
int ibv_dealloc_dmah - deallocate a dma handle
.SH SYNOPSIS
.IP
.nf
\f[C]
#include <infiniband/verbs.h>

struct ibv_dmah *ibv_alloc_dmah(struct ibv_context *context, struct ibv_dmah_init_attr *attr);

int ibv_dealloc_dmah(struct ibv_dmah *dmah);
\f[R]
.fi
.SH DESCRIPTION
.PP
\f[B]ibv_alloc_dmah()\f[R] allocates an \f[I]ibv_dmah\f[R] object that
is associated with the given \f[I]context\f[R] and the input
\f[I]attr\f[R] parameter.
.PP
The allocated handle can be later used for optimizing DMA and RDMA
operations associated with a registered memory region.
.PP
Once the \f[I]ibv_dmah\f[R] usage has been ended
\f[I]ibv_dealloc_dmah()\f[R] should be called.
.PP
This call will release resources that were earlier allocated using the
\f[B]ibv_alloc_dmah()\f[R] API.
.SH ARGUMENTS
.SS attr
.IP
.nf
\f[C]
enum ibv_tph_mem_type {
    IBV_TPH_MEM_TYPE_VM, /* volatile memory */
    IBV_TPH_MEM_TYPE_PM, /* persistent memory */
};

enum ibv_dmah_init_attr_mask {
    IBV_DMAH_INIT_ATTR_MASK_CPU_ID = 1 << 0,
    IBV_DMAH_INIT_ATTR_MASK_PH = 1 << 1,
    IBV_DMAH_INIT_ATTR_MASK_TPH_MEM_TYPE = 1 << 2,
};

struct ibv_dmah_init_attr {
    uint32_t comp_mask; /* From ibv_dmah_init_attr_mask */
    uint32_t cpu_id;
    uint8_t ph;
    uint8_t tph_mem_type; /* From enum ibv_tph_mem_type */
};
\f[R]
.fi
.TP
\f[I]comp_mask\f[R]
Bitmask specifying what fields in the structure are valid.
.TP
\f[I]cpu_id\f[R]
The cpu id that the dma handle refers to.
.TP
\f[I]ph\f[R]
Processing hints, used to aid in optimizing the handling of transactions
over PCIe.
.TP
\f[I]tph_mem_type\f[R]
The target memory type, one among \f[I]enum ibv_tph_mem_type\f[R].
.SH RETURN VALUE
.PP
\f[B]ibv_alloc_dmah()\f[R] returns a pointer to the allocated dma handle
object, or NULL if the request fails.
.PP
\f[B]ibv_dealloc_dmah()\f[R] returns 0 upon success, otherwise the errno
value.
.SH SEE ALSO
.PP
\f[B]ibv_reg_mr_ex\f[R](3)
.SH AUTHOR
.PP
Yishai Hadas <yishaih@nvidia.com>
